公开(公告)号：US07974044B1

公开(公告)日：2011-07-05

申请号：US09491098

申请日：2000-01-25

Applicant: Gregory Paul Myers ,  Adam Karl Himes

Inventor： Gregory Paul Myers ,  Adam Karl Himes

IPC: G11B5/48 ,  H05K1/18

CPC classification number: H05K3/363 ,  G11B5/4846 ,  G11B5/486 ,  H05K2201/0397 ,  H05K2201/09909 ,  H05K2201/2009

Abstract: A FOS circuit and a method for fabricating the same that reduces the possibilities of shorts or damage to a circuit board during assembly due to solder reflow. The FOS circuit has a tail, a shunt bar, a plurality of flying leads, and a dam. The tail has a first and second end. The shunt bar is located adjacent to the second end of the tail. The plurality of flying leads project substantially perpendicular from the first edge of the second end of the tail. The plurality of flying leads are substantially parallel to one another and extend between the second end of the tail and the shunt bar. A plurality of electrical paths are formed through the tail to the flying leads. The dam intersects the flying leads and extends from a first flying lead to a last flying lead and is substantially parallel with the first edge of the second end of the tail.

Abstract translation: 一种FOS电路及其制造方法，其可减少由于回流焊而组装期间电路板短路或损坏的可能性。 FOS电路具有尾部，分流杆，多个飞行引线和大坝。 尾巴有第一和第二端。 分流杆位于尾部的第二端附近。 多个飞行引线从尾部的第二端的第一边缘基本垂直地突出。 多个飞行引线基本上彼此平行并且在尾部的第二端和分流杆之间延伸。 通过尾部形成多个电路径到飞行线。 大坝与飞行导线相交，并从第一飞行导线延伸到最后一个飞行导线，并且基本上平行于尾部的第二端的第一边缘。