公开(公告)号：USD663014S1

公开(公告)日：2012-07-03

申请号：US29361401

申请日：2010-05-11

申请人： Paul Taylor ,  Gary Doyle

设计人： Paul Taylor ,  Gary Doyle

公开(公告)号：US20050013527A1

公开(公告)日：2005-01-20

申请号：US10604410

申请日：2003-07-18

申请人： Gary Doyle ,  Kenneth Goodnow ,  Riyon Harding ,  Francis Kampf ,  Jason Norman ,  Sebastian Ventrone

发明人： Gary Doyle ,  Kenneth Goodnow ,  Riyon Harding ,  Francis Kampf ,  Jason Norman ,  Sebastian Ventrone

IPC分类号： G02B6/43 ,  G02B6/12 ,  G02B6/26

CPC分类号： G02B6/43

摘要： Disclosed is an integrated circuit comprising a plurality of cores attached to at least one transmitter and receiver, an optical transmission network embedded within the wire levels of the integrated circuit, and wherein the transmitter and receivers send and receive data on the network. Also disclosed is a method of transmitting signals within an integrated circuit comprising an integrated circuit comprising a plurality of cores and optical paths, selecting an optical path from the plurality of optical paths for transmitting data, and transmitting the data on the selected optical path. Also disclosed is an integrated circuit comprising an optical transmission network, a plurality of cores, and a plurality of controllers, all three being operatively attached to each other.

摘要翻译： 公开了一种集成电路，其包括附接到至少一个发射机和接收机的多个核心，嵌入在集成电路的有线电平内的光传输网络，并且其中发射机和接收机在网络上发送和接收数据。 还公开了一种在包括多个核心和光路的集成电路的集成电路内传输信号的方法，从多个光路中选择用于发送数据的光路，以及在所选择的光路上发送数据。 还公开了一种集成电路，其包括光传输网络，多个核心和多个控制器，所有三个可操作地彼此连接。

公开(公告)号：US06305004B1

公开(公告)日：2001-10-16

申请号：US09387062

申请日：1999-08-31

申请人： Gustavo Tellez ,  Gary Doyle ,  Philip Honsinger ,  Steven Lovejoy ,  Charles Meiley ,  Gorden Starkey ,  Reginald Wilcox, Jr.

发明人： Gustavo Tellez ,  Gary Doyle ,  Philip Honsinger ,  Steven Lovejoy ,  Charles Meiley ,  Gorden Starkey ,  Reginald Wilcox, Jr.

IPC分类号： G06F1750

CPC分类号： G06F17/5077

摘要： A method for automatically wiring (i.e., routing) an integrated circuit chip after completing the placement of cells on the chip is described. The method employs a maze routing such that the spacing between the routed wires is increased, while at the same time maintaining control over the total wiring length. The maze routing herein described is modified to improve chip yield, reduce wiring capacitance, limit power consumption and coupled signal noise, all of which are achieved by increasing wire-to-wire spacings.

摘要翻译： 描述了在完成芯片上的单元的放置之后自动布线（即布线）集成电路芯片的方法。 该方法采用迷宫路由，使得布线之间的间距增加，同时保持对总布线长度的控制。 这里描述的迷宫路由被改进以提高芯片产量，降低布线电容，限制功耗和耦合信号噪声，所有这些都是通过增加线对线间距来实现的。