公开(公告)号：US20070027875A1

公开(公告)日：2007-02-01

申请号：US11189343

申请日：2005-07-26

Applicant: William Mitchell ,  Gary Almond

Inventor： William Mitchell ,  Gary Almond

IPC: G06F17/30

CPC classification number: G06Q30/02 ,  G06Q10/06 ,  G06Q10/10

Abstract: An apparatus comprises a database administration interface and a graphical user interface configured to receive information regarding an organization, an organization evaluation, and an evaluation of the organization evaluation. The apparatus further comprises a database including a database schema configured to store information relating to the organization that is received by the database administration interface. The apparatus further comprises an organization evaluation module configured to assign a composite performance designation to the organization based on information relating to the organization that is stored in the database. The composite performance designation is stored in the database. The apparatus further comprises a plurality of distributed client interfaces configured to access and controllably display information stored in the database relating to the organization.

Abstract translation: 一种装置包括数据库管理界面和图形用户界面，其被配置为接收关于组织的信息，组织评估和组织评估的评估。 该装置还包括数据库，该数据库包括被配置为存储与由数据库管理界面接收的组织有关的信息的数据库模式。 该装置还包括组织评估模块，该组织评估模块被配置为基于与存储在数据库中的组织相关的信息向组织分配组合性能指定。 复合性能指定存储在数据库中。 该装置还包括被配置为访问和可控地显示存储在与组织有关的数据库中的信息的多个分布式客户端接口。

公开(公告)号：US4975695A

公开(公告)日：1990-12-04

申请号：US103611

申请日：1987-10-01

Applicant: Gary Almond ,  Asghar Mostafa ,  Fred S. Lee

Inventor： Gary Almond ,  Asghar Mostafa ,  Fred S. Lee

IPC: H04L12/64 ,  H04Q11/04

CPC classification number: H04L12/64 ,  H04Q11/0407

Abstract: A communications node for handling circuit and packet switching and capable of expansion to include multiple switching matrices, multiple network processors and multiple packet processors is disclosed. Each switch matrix has multipile I/O ports and communications with user interfaces, network interfaces and other system components via bidirectional data links. At least one switch matrix is connected via a bidirectional data link to a packet processor and a network processor. All processors are interconnected via a computer bus. Switch matrices are connected to each other either by a backplane bus or via bidirectional data links.

Abstract translation: 公开了一种用于处理电路和分组交换并能够扩展以包括多个交换矩阵，多个网络处理器和多个分组处理器的通信节点。 每个交换矩阵具有多端口I / O端口，并通过双向数据链路与用户界面，网络接口和其他系统组件进行通信。 至少一个开关矩阵经由双向数据链路连接到分组处理器和网络处理器。 所有处理器通过计算机总线互连。 开关矩阵通过背板总线或双向数据链路相互连接。