Invention Grant
US4975695A High speed communication processing system 失效
高速通讯处理系统

High speed communication processing system
Abstract:
A communications node for handling circuit and packet switching and capable of expansion to include multiple switching matrices, multiple network processors and multiple packet processors is disclosed. Each switch matrix has multipile I/O ports and communications with user interfaces, network interfaces and other system components via bidirectional data links. At least one switch matrix is connected via a bidirectional data link to a packet processor and a network processor. All processors are interconnected via a computer bus. Switch matrices are connected to each other either by a backplane bus or via bidirectional data links.
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