Process for reducing surface variations for polished wafer
    1.
    发明授权
    Process for reducing surface variations for polished wafer 失效
    减少抛光晶片表面变化的工艺

    公开(公告)号:US06479386B1

    公开(公告)日:2002-11-12

    申请号:US09505269

    申请日:2000-02-16

    IPC分类号: H01L21302

    CPC分类号: B24B37/345 B24B37/042

    摘要: A process for forming a semiconductor wafer which is single side polished improves nanotopology and flatness of the polished wafer. The process reduces the effect of back side surface features, such as edge ring phenomena and back side laser marks, on nanotopology, thereby improving oxide layer uniformity for chemical/mechanical planarization (CMP) processing, and flatness on the polished front side of the wafer after polishing. The wafer is mounted on a polishing block by wax. The edge ring causes certain deformation and stress in the wafer upon mounting, which is held by the wax. After mounting, the wax is heated to allow the wafer to relax, removing the stress, without degrading the bond of the wafer to the polishing block. The wafer is polished and removed from the polishing blocks. The polished surface substantially retains its shape after being de-mounted from the block.

    摘要翻译: 用于形成单面抛光的半导体晶片的工艺改善了抛光晶片的纳米拓扑和平坦度。 该方法降低了背面表面特征(例如边缘环现象和背面激光标记)对纳米拓扑学的影响,从而提高了化学/机械平面化(CMP)处理的氧化层均匀性,并且在晶片的抛光正面上的平坦度 抛光后。 晶片通过蜡安装在抛光块上。 边缘环在由蜡保持的安装时在晶片中引起一定的变形和应力。 在安装之后,蜡被加热以允许晶片松弛,消除应力,而不降低晶片与抛光块的结合。 抛光晶片并从抛光块移除。 抛光表面在从块上拆卸之后基本上保持其形状。