-
1.发明授权公开(公告)号：US08558613B2
公开(公告)日：2013-10-15
申请号：US13196430
申请日：2011-08-02
IPC分类号： H03G3/20
CPC分类号： H03G3/30 , H03G3/3052 , H03G3/3078 , H04L25/03878
摘要： Apparatus and methods are disclosed, such as those involving a receiver device. One such apparatus includes an equalizer configured to process an input signal transmitted over a channel. The equalizer can include a programmable gain amplifier (PGA) block which includes an input node configured to receive the input signal; an output node; and a programmable gain amplifier (PGA). The PGA amplifies the input signal with an adjustable gain. The PGA block also includes a gain control block having an input electrically coupled to the input node. The gain control block is configured to adjust the gain of the PGA at least partly in response to the input signal from the input node such that the PGA generates an output signal with a substantially constant amplitude envelope to the output node.
摘要翻译： 公开了诸如涉及接收机设备的装置和方法。 一种这样的装置包括被配置为处理通过信道发送的输入信号的均衡器。 均衡器可以包括可编程增益放大器（PGA）块，其包括被配置为接收输入信号的输入节点; 输出节点; 和可编程增益放大器（PGA）。 PGA以可调增益放大输入信号。 PGA块还包括具有电耦合到输入节点的输入的增益控制块。 增益控制块被配置为至少部分地响应于来自输入节点的输入信号来调整PGA的增益，使得PGA向输出节点产生具有基本上恒定的幅度包络的输出信号。
-
公开(公告)号：US887690A
公开(公告)日：1908-05-12
申请号：US1907382556
申请日：1907-07-06
申请人： DANIEL MULCAHY
发明人： PEARCE LOUIS
CPC分类号： E05C3/167 , B65F1/1615 , Y10S292/20 , Y10T292/1068 , Y10T292/1077 , Y10T292/1092
-
公开(公告)号：US20070057679A1
公开(公告)日：2007-03-15
申请号：US11224642
申请日：2005-09-12
IPC分类号： G01R35/00
CPC分类号： H03H7/0153 , H03H2210/021 , H03H2210/043
摘要： A system and method of calibration develops a function from which is generated a monotonic time response; a gating period is defined from the monotonic time response and any error in the frequency of a reference signal is determined during the gating period; from that error an error signal is generated for adjusting the time constant of a circuit to be calibrated.
摘要翻译： 校准的系统和方法产生一个函数，由此产生单调时间响应; 从单调时间响应定义门控周期，并且在选通期间确定参考信号频率的任何误差; 从该误差产生用于调整要校准的电路的时间常数的误差信号。
-
-
5.发明申请公开(公告)号：US20130033326A1
公开(公告)日：2013-02-07
申请号：US13196430
申请日：2011-08-02
IPC分类号： H03G3/30
CPC分类号： H03G3/30 , H03G3/3052 , H03G3/3078 , H04L25/03878
摘要： Apparatus and methods are disclosed, such as those involving a receiver device. One such apparatus includes an equalizer configured to process an input signal transmitted over a channel. The equalizer can include a programmable gain amplifier (PGA) block which includes an input node configured to receive the input signal; an output node; and a programmable gain amplifier (PGA). The PGA amplifies the input signal with an adjustable gain. The PGA block also includes a gain control block having an input electrically coupled to the input node. The gain control block is configured to adjust the gain of the PGA at least partly in response to the input signal from the input node such that the PGA generates an output signal with a substantially constant amplitude envelope to the output node.
摘要翻译： 公开了诸如涉及接收机设备的装置和方法。 一种这样的装置包括被配置为处理通过信道发送的输入信号的均衡器。 均衡器可以包括可编程增益放大器（PGA）块，其包括被配置为接收输入信号的输入节点; 输出节点; 和可编程增益放大器（PGA）。 PGA以可调增益放大输入信号。 PGA块还包括具有电耦合到输入节点的输入的增益控制块。 增益控制块被配置为至少部分地响应于来自输入节点的输入信号来调整PGA的增益，使得PGA向输出节点产生具有基本上恒定的幅度包络的输出信号。
-
公开(公告)号：US20060126606A1
公开(公告)日：2006-06-15
申请号：US11011560
申请日：2004-12-14
申请人： Daniel Mulcahy , Kimo Tam
发明人： Daniel Mulcahy , Kimo Tam
CPC分类号： H03K19/00323 , H03K19/0016
摘要： A method of operating a circuit for processing a digital signal is disclosed. The circuit includes various circuit stages having respective enabled states. A present signal path is established which includes circuit stages in their respective enabled states. Power is disabled to selected circuit stages not used in the present signal path so as to minimize power consumption in the disabled circuit stages. A data signal is then processed through the circuit stages in the present signal path. Before a next signal path is needed, power is re-enabled to selected disabled circuit stages in the next signal path to allow the enabled circuit stages to approach their respective enabled states. Then the next signal path can be established including the enabled circuit stages in their respective enabled states. The data signal can then be processed through the circuit stages in the next signal path.
摘要翻译： 公开了一种操作数字信号处理电路的方法。 电路包括具有各自使能状态的各种电路级。 建立包括其各自使能状态中的电路级的当前信号路径。 电源被禁用在当前信号路径中未使用的选定电路级，以便使残留电路级中的功耗最小化。 然后通过当前信号路径中的电路级处理数据信号。 在需要下一个信号路径之前，将电源重新启用到下一个信号路径中的选定的禁用电路级，以允许使能的电路级接近其各自的使能状态。 然后可以建立下一个信号路径，其中包括使能的电路级在它们各自的使能状态。 然后可以通过下一个信号路径中的电路级来处理数据信号。
-
-
-
-
-
搜索结果
6 条记录 (耗时 0.014 秒)
