Clock signal regeneration system operating on ternary pulses
    1.
    发明授权
    Clock signal regeneration system operating on ternary pulses 失效
    时钟信号再生系统以三进制脉冲运行

    公开(公告)号:US3999135A

    公开(公告)日:1976-12-21

    申请号:US592239

    申请日:1975-07-01

    CPC分类号: H04L7/027

    摘要: Apparatus for regenerating periodic clock signals in a ternary pulse transmission system. It comprises an input transformer with a secondary winding having a grounded midpoint, a high "Q" band-pass filter tuned to the repetition frequency of the clock signals, and a shaping circuit for these clock signals. The apparatus further comprises a threshold level comparator differentially supplied by the input transformer and supplying through an addition circuit an adjustable delay line whose output is connected through the filter to the said shaping circuit. The latter circuit may comprise a limiting amplifier combined with a pair of flip-flop circuits.

    摘要翻译: 用于在三元脉冲传输系统中再生周期性时钟信号的装置。 它包括具有接地中点的次级绕组的输入变压器,被调谐到时钟信号的重复频率的高“Q”带通滤波器,以及用于这些时钟信号的整形电路。 该装置还包括由输入变压器差分提供的阈值电平比较器,并且通过加法电路提供可调延迟线,其输出通过滤波器连接到所述整形电路。 后一电路可以包括与一对触发器电路组合的限幅放大器。

    Synchronization device for digital frame transmission
    2.
    发明授权
    Synchronization device for digital frame transmission 失效
    数字帧传输同步装置

    公开(公告)号:US4594728A

    公开(公告)日:1986-06-10

    申请号:US624718

    申请日:1984-06-26

    IPC分类号: H04J3/06 H04L7/04

    CPC分类号: H04J3/0605

    摘要: A synchronization device for digital data frame transmission system comprising an n bit series register transferring its contents at the line frequency to a parallel register also of n bits. The m first bits of the series register are also directed to a logic circuit which tests their conformity with the beginning of the synchronization word. When there is conformity, the logic circuit controls a divider dividing by n which controls, in its turn, at the line frequency divided by n, the transfer of the contents of the parallel register to a PROM memory. The purpose of the PROM is to recognize the entire synchronization word. When there is no recognition, the operation of the divide by n divider is inhibited and the procedure begins again.

    摘要翻译: 一种用于数字数据帧传输系统的同步装置,包括n位串行寄存器,将其线路频率的内容传送到n位的并行寄存器。 串行寄存器的m个第一位也被引导到一个逻辑电路,它测试它们与同步字开始的一致性。 当符合时,逻辑电路控制除以n的除法器,其依次以线频率除以n,将并行寄存器的内容传送到PROM存储器。 PROM的目的是识别整个同步字。 当没有识别时,除以n分频器的运算被禁止,并且程序再次开始。

    Information transcoding process and a transmission system using such a
process
    3.
    发明授权
    Information transcoding process and a transmission system using such a process 失效
    信息转码过程和使用这种过程的传输系统

    公开(公告)号:US4490712A

    公开(公告)日:1984-12-25

    申请号:US286898

    申请日:1981-07-27

    IPC分类号: H03M7/14 H04L25/49 H03K13/00

    CPC分类号: H04L25/4925

    摘要: A process and system are provided for transmitting additional information, called order track, superimposed on the information to be transmitted, by alteration of the coding law. The process involves:detection of at least one possible value of the information to be transmitted, for which the coding law is altered depending on the order track information.The first coding is transformed into a second coding by choice of one of several alphabets capable of ensuring such a transformation, this choice being effected depending on the value of the current numerical sum, in accordance with the coding law such that the value of this numerical sum is minimized.the output at one end of the transmission channel of the information is expressed in the second coding as altered by the order track.The information received at the other end of the transmission channel is transformed into information expressed in the first coding.The order track is detected by detection of the alteration in the coding law.

    摘要翻译: 提供了一种过程和系统,用于通过改变编码规则来发送叠加在要发送的信息上的附加信息(称为订单轨迹)。 该过程涉及:检测要发送的信息的至少一个可能值,根据订单轨迹信息,编码规则被改变。 通过选择能够确保这种变换的几个字母表之一,第一编码被转换成第二编码,根据编码规则,该选择取决于当前数字和的值来实现,使得该数值 总和最小化。 信息的传输信道的一端的输出以由订单轨道改变的第二编码来表示。 在传输信道的另一端接收的信息被转换成以第一编码表示的信息。 通过检测编码法中的改变来检测订单轨迹。