公开(公告)号：US07810961B2

公开(公告)日：2010-10-12

申请号：US12010461

申请日：2008-01-25

Applicant: Ching Cheng Tsai ,  Chia Hsin Chen

Inventor： Ching Cheng Tsai ,  Chia Hsin Chen

IPC: G02B6/10

CPC classification number: H04M1/23 ,  F21Y2115/10 ,  G02B6/0055 ,  H01H2219/014 ,  H01H2219/044 ,  H01H2221/07 ,  H04M1/22

Abstract: An energy-saving light-emitting module is provided, comprising: a light guide plate having a light-incident surface, a bottom surface intersecting the light-incident surface and a light-emitting surface opposite the bottom surface, wherein a plurality of recesses are provided at the bottom surface; a light source placed at one side of the light-incident surface of the light guide plate; and a reflective plate placed at the bottom of the light guide plate for reflecting light rays from the light source into the light guide plate. The light rays emitted by the light source reach the arc surface of each recess at the bottom side of the light guide plate, and the light rays are then reflected to the light-emitting surface. Meanwhile, during the light-emitting process, light rays are concentrated at the arc surface of each recess. The concentration of light rays increases overall luminance produced by the module, and thus, energy is saved effectively.

Abstract translation: 提供了一种节能发光模块，包括：具有光入射面的导光板，与光入射面相交的底面和与所述底面相反的发光面，其中，多个凹部为 设在底面; 放置在所述导光板的光入射面的一侧的光源; 以及放置在导光板的底部的反射板，用于将来自光源的光线反射到导光板中。 由光源发出的光线到达导光板底面的各凹部的圆弧面，然后将光线反射到发光面。 同时，在发光过程中，光线集中在每个凹部的弧形表面。 光线的浓度增加了由模块产生的整体亮度，从而有效地节省了能量。

公开(公告)号：US07750261B2

公开(公告)日：2010-07-06

申请号：US12078222

申请日：2008-03-28

Applicant: Ching Cheng Tsai ,  Chia Hsin Chen

Inventor： Ching Cheng Tsai ,  Chia Hsin Chen

IPC: H01H13/70

CPC classification number: G06F1/1662 ,  G06F1/1616 ,  G06F3/0202

Abstract: A waterproof keyboard comprises: keys, an elastic rubber layer, a circuit board layer, a bottom board, and a sealing layer. The keys are mounted on the bottom board on which a plurality of apertures are disposed, and the sealing layer is disposed under the bottom surface of the bottom board. Corresponding to the apertures on the bottom board, respective adhesives are formed on the sealing layer so as to firmly adhere the sealing layer to the bottom surface of the bottom board.

Abstract translation: 防水键盘包括：键，弹性橡胶层，电路板层，底板和密封层。 钥匙安装在底板上，在其上设置有多个孔，并且密封层设置在底板的底表面下方。 对应于底板上的孔，在密封层上形成各自的粘合剂，以便将密封层牢固地粘附到底板的底表面上。

公开(公告)号：US20090172264A1

公开(公告)日：2009-07-02

申请号：US12238152

申请日：2008-09-25

Applicant: Chien-Ping Chung ,  Chia-Hsin Chen ,  Ming-Che Liu

Inventor： Chien-Ping Chung ,  Chia-Hsin Chen ,  Ming-Che Liu

IPC: G06F12/02 ,  G06F12/00

CPC classification number: G06F3/0659 ,  G06F3/061 ,  G06F3/0679 ,  G06F12/0246

Abstract: A data accessing command integration method includes the following steps. Firstly, M data accessing commands are sequentially received through a bus, wherein N data accessing commands contained in the M data accessing commands have the same command type and comply with a sequential address relationship. Next, the N data accessing commands are re-ordered according to the addressing sequence, so that a first data corresponding to the re-ordered N data accessing commands are sequentially accessed in the data memory.

Abstract translation: 数据访问命令集成方法包括以下步骤。 首先，通过总线顺序地接收M个数据访问命令，其中包含在M个数据访问命令中的N个数据访问命令具有相同的命令类型并且遵循顺序地址关系。 接下来，根据寻址序列重新排序N个数据访问命令，从而在数据存储器中顺序地访问对应于重新排序的N个数据访问命令的第一数据。

公开(公告)号：US06446172B1

公开(公告)日：2002-09-03

申请号：US09335602

申请日：1999-06-18

Applicant: Chia-Hsin Chen ,  Nai-Shung Chang

Inventor： Chia-Hsin Chen ,  Nai-Shung Chang

IPC: G06F1208

CPC classification number: G06F12/0859 ,  G06F13/161

Abstract: A memory access control method and system is provided for use on a computer system to control the memory access operation by a central processing unit (CPU) to a memory unit in a more efficient manner than the prior art. This memory access control method and system is characterized by, for each read request from the CPU, the prompt transfer of the corresponding internal read-request signal to the memory control unit, right after it is issued and without waiting until the CPU issues the L1 write-back signal of the current read request. If the current read request is a hit to the cache memory, a read-stop signal is promptly issued to stop the current read operation on the memory unit, and then a cache write-back operation is performed to write the cache data back into the memory unit. This method and system can help reduce the period of waiting states by the CPU, thus increasing the overall memory access performance by the CPU and the overall system performance of the computer system.

Abstract translation: 提供存储器访问控制方法和系统，用于在计算机系统上以比现有技术更有效的方式将中央处理单元（CPU）的存储器访问操作控制到存储器单元。 这种存储器访问控制方法和系统的特征在于，对于来自CPU的每个读取请求，在相应的内部读取请求信号被发出之后立即将其传送到存储器控制单元，并且不等待直到CPU发出L1 当前读取请求的回写信号。 如果当前读取请求是对高速缓存存储器的命中，则立即发出读停止信号以停止对存储器单元的当前读取操作，然后执行高速缓存回写操作以将高速缓存数据写回到 存储单元 该方法和系统可以帮助减少CPU等待状态的时间，从而提高CPU的整体内存访问性能以及计算机系统的整体系统性能。

公开(公告)号：US06278641B1

公开(公告)日：2001-08-21

申请号：US09578234

申请日：2000-05-24

Applicant: Chia-Hsin Chen ,  Jiin Lai

Inventor： Chia-Hsin Chen ,  Jiin Lai

IPC: G11C700

CPC classification number: G11C7/222 ,  G11C7/22 ,  G11C11/4076

Abstract: An apparatus and method capable of programmably delaying a clock of a memory. The apparatus and method utilize the BIOS, external electric switches or other logic devices to selectively delay the clock of the DRAM and/or the internal clock of the north bridge, by which the DRAM has enough setup time at the rising edge of work clock to correctly read out the command word. The north bridge can then correctly receive data from the DRAM module and transfer the data to the CPU or AGP. Therefore, the memory can function normally even if the memory is operated at high speed or with heavy loading.

Abstract translation: 一种能够可编程地延迟存储器的时钟的装置和方法。 该装置和方法利用BIOS，外部电气开关或其他逻辑装置来选择性地延迟DRAM的时钟和/或北桥的内部时钟，由此DRAM在工作时钟的上升沿具有足够的建立时间 正确读出命令字。 然后，北桥可以从DRAM模块正确接收数据，并将数据传输到CPU或AGP。 因此，即使存储器以高速或大负载运行，存储器也能正常工作。

公开(公告)号：US08843663B2

公开(公告)日：2014-09-23

申请号：US13662566

申请日：2012-10-29

Applicant: Ming-Hui Chiu ,  Chia-Hsin Chen

Inventor： Ming-Hui Chiu ,  Chia-Hsin Chen

IPC: G06F3/06 ,  G06F3/00 ,  G06F13/12

CPC classification number: G06F3/00 ,  G06F3/038 ,  G06F3/061 ,  G06F3/064 ,  G06F3/0674

Abstract: A data transmission device and a command merging method for data transmission are provided. The data transmission device includes a command register and a command merging unit. The command register receives and temporary storages a plurality of original commands, wherein the original commands include a plurality of memory blocks. When the command merging unit judges these memory blocks of the original commands to be a continuous memory block, the command merging unit merges the original commands into a merging command, and transmits the merging command to a peripheral device. Thus, the multiple commands send by the host can be analyzed and merged by the data transmission device to decrease a number of the commands to be proceed by the peripheral device, so as to speed up a command processing time of the peripheral device efficiently.

Abstract translation: 提供了一种用于数据传输的数据传输设备和命令合并方法。 数据传输装置包括命令寄存器和命令合并单元。 命令寄存器接收和临时存储多个原始命令，其中原始命令包括多个存储器块。 当命令合并单元将原始命令的这些存储块判断为连续存储块时，命令合并单元将原始命令合并成合并命令，并将合并命令发送到外围设备。 因此，由主机发送的多个命令可以由数据传输装置进行分析和合并，以减少由外围设备进行的命令的数量，以便有效地加速外围设备的命令处理时间。

公开(公告)号：US20130132612A1

公开(公告)日：2013-05-23

申请号：US13662566

申请日：2012-10-29

Applicant: Ming-Hui Chiu ,  Chia-Hsin Chen

Inventor： Ming-Hui Chiu ,  Chia-Hsin Chen

IPC: G06F3/00

CPC classification number: G06F3/00 ,  G06F3/038 ,  G06F3/061 ,  G06F3/064 ,  G06F3/0674

Abstract: A data transmission device and a command merging method for data transmission are provided. The data transmission device includes a command register and a command merging unit. The command register receives and temporary storages a plurality of original commands, wherein the original commands include a plurality of memory blocks. When the command merging unit judges these memory blocks of the original commands to be a continuous memory block, the command merging unit merges the original commands into a merging command, and transmits the merging command to a peripheral device. Thus, the multiple commands send by the host can be analyzed and merged by the data transmission device to decrease a number of the commands to be proceed by the peripheral device, so as to speed up a command processing time of the peripheral device efficiently.

Abstract translation: 提供了一种用于数据传输的数据传输设备和命令合并方法。 数据传输装置包括命令寄存器和命令合并单元。 命令寄存器接收和临时存储多个原始命令，其中原始命令包括多个存储器块。 当命令合并单元将原始命令的这些存储块判断为连续存储块时，命令合并单元将原始命令合并成合并命令，并将合并命令发送到外围设备。 因此，由主机发送的多个命令可以由数据传输装置进行分析和合并，以减少由外围设备进行的命令的数量，以便有效地加速外围设备的命令处理时间。

公开(公告)号：US20120002104A1

公开(公告)日：2012-01-05

申请号：US13108007

申请日：2011-05-16

Applicant: Chia-Hsin Chen ,  Wen-Chieh Chiang

Inventor： Chia-Hsin Chen ,  Wen-Chieh Chiang

IPC: H04N7/01

CPC classification number: G09G3/2096

Abstract: A portable display apparatus of a video signal including a video signal source, a signal masking module, and a display panel is provided. The video signal source generates a data enable signal and a clock signal. The signal masking module is electrically connected to the video signal source, receives the data enable signal and the clock signal, and masks a part of the clock signal according to the data enable signal and a masking signal to provide a processing signal. The display panel is electrically connected to the signal masking module, receives the processing signal, and displays a part of the video signal to be an image according to the processing signal.

Abstract translation: 提供了包括视频信号源，信号屏蔽模块和显示面板的视频信号的便携式显示装置。 视频信号源产生数据使能信号和时钟信号。 信号屏蔽模块电连接到视频信号源，接收数据使能信号和时钟信号，并根据数据使能信号和屏蔽信号屏蔽一部分时钟信号以提供处理信号。 显示面板电连接到信号屏蔽模块，接收处理信号，并根据处理信号将视频信号的一部分显示为图像。

公开(公告)号：US20090049233A1

公开(公告)日：2009-02-19

申请号：US12014991

申请日：2008-01-16

Applicant: Chia-Hsin Chen ,  Chun-Kun Lee

Inventor： Chia-Hsin Chen ,  Chun-Kun Lee

IPC: G06F12/00

CPC classification number: G06F12/0804 ,  G06F2212/2022

Abstract: A method for operating a flash memory is provided. The flash memory comprises a controller, a cache, and a plurality of blocks. By using a cache to preload data from the host, the buffer of the controller can be smaller than the capacity of a single block or omitted entirely. Smooth data transmission is still maintained.

Abstract translation: 提供了一种用于操作闪速存储器的方法。 闪存包括控制器，高速缓存和多个块。 通过使用缓存从主机预加载数据，控制器的缓冲区可以小于单个块的容量或完全省略。 平稳的数据传输仍然保持不变。

公开(公告)号：US20090027237A1

公开(公告)日：2009-01-29

申请号：US12060874

申请日：2008-04-02

Applicant: Chia-Hsin Chen

Inventor： Chia-Hsin Chen

IPC: H03M11/00 ,  H03K17/94

CPC classification number: H03M11/20

Abstract: A key system includes a microcontroller and a plurality of keys. The first ends of the keys are coupled to a plurality of data input ports of the microcontroller respectively. The second ends of the keys are coupled to a key input port of the microcontroller. The key system utilizes the data signals inputted to the microcontroller as scan signals for the keys. The signal received by the key input port is detected to determine which key is triggered. Thus, only one key input port is sufficient to detect which of the plurality of keys is triggered.

Abstract translation: 关键系统包括微控制器和多个键。 键的第一端分别耦合到微控制器的多个数据输入端口。 键的第二端耦合到微控制器的键输入端口。 关键系统利用输入到微控制器的数据信号作为键的扫描信号。 检测由密钥输入端口接收到的信号，以确定哪个键被触发。 因此，只有一个键输入端口足以检测多个键中的哪一个被触发。