Reducing programming time of a field programmable gate array employing
antifuses
    1.
    发明授权
    Reducing programming time of a field programmable gate array employing antifuses 失效
    减少使用反熔丝的现场可编程门阵列的编程时间

    公开(公告)号:US5661412A

    公开(公告)日:1997-08-26

    申请号:US541662

    申请日:1995-10-10

    CPC classification number: H03K19/17776 G11C17/18 H03K19/17764 H03K19/1778

    Abstract: Critical programmed reliability of a metal-to-metal amorphous silicon antifuse is a function of programming current, operating current and total programming time. The time required to program a field programmable gate array is reduced by classifying antifuses to be programmed into three or more classes according to the amount of programming time required to achieve critical programmed reliability under programming current and operating current conditions. Each of these classes of antifuses is programmed with near the minimum programming time required to program every antifuse in the class to critical reliability. In this way, large numbers of antifuses are not programmed with significantly greater amounts of programming time than are actually required to program them to critical reliability. The time required to program the field programmable gate array is therefore reduced. Techniques for obtaining critical reliability data used in classifying antifuses are also disclosed. Classifications based on antifuse type, programming method, and operating conditions are also disclosed.

    Abstract translation: 金属对金属非晶硅反熔丝的关键编程可靠性是编程电流,工作电流和总编程时间的函数。 根据在编程电流和工作电流条件下实现关键编程可靠性所需的编程时间量,将减少编程的反熔丝分为三个或更多个等级,从而减少编程现场可编程门阵列所需的时间。 这些类别的反熔丝中的每一个都被编程为将类中的每个反熔丝编程为关键可靠性所需的最小编程时间。 以这种方式,大量的反熔丝不会被编程为比将其编程为关键可靠性所需的显着更大的编程时间。 因此减少了编程现场可编程门阵列所需的时间。 还公开了用于获得用于分类反熔丝的关键可靠性数据的技术。 还公开了基于反熔丝型,编程方法和操作条件的分类。

Patent Agency Ranking