公开(公告)号：US09608059B2

公开(公告)日：2017-03-28

申请号：US13995418

申请日：2011-12-20

申请人： Annalisa Cappellani ,  Stephen M. Cea ,  Tahir Ghani ,  Harry Gomez ,  Jack T. Kavalieros ,  Patrick H. Keys ,  Seiyon Kim ,  Kelin J. Kuhn ,  Aaron D. Lilak ,  Rafael Rios ,  Mayank Sahni

发明人： Annalisa Cappellani ,  Stephen M. Cea ,  Tahir Ghani ,  Harry Gomez ,  Jack T. Kavalieros ,  Patrick H. Keys ,  Seiyon Kim ,  Kelin J. Kuhn ,  Aaron D. Lilak ,  Rafael Rios ,  Mayank Sahni

IPC分类号： H01L29/06 ,  H01L29/66 ,  H01L29/78 ,  H01L21/762 ,  H01L29/775 ,  H01L27/12 ,  B82Y10/00

CPC分类号： H01L29/66818 ,  B82Y10/00 ,  H01L21/762 ,  H01L21/76216 ,  H01L27/1203 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/66795 ,  H01L29/775 ,  H01L29/785

摘要： Semiconductor devices with isolated body portions are described. For example, a semiconductor structure includes a semiconductor body disposed above a semiconductor substrate. The semiconductor body includes a channel region and a pair of source and drain regions on either side of the channel region. An isolation pedestal is disposed between the semiconductor body and the semiconductor substrate. A gate electrode stack at least partially surrounds a portion of the channel region of the semiconductor body.

公开(公告)号：US20130320455A1

公开(公告)日：2013-12-05

申请号：US13995418

申请日：2011-12-20

申请人： Annalisa Cappellani ,  Stephen M. Cea ,  Tahir Ghani ,  Harry Gomez ,  Jack T. Kavalieros ,  Patrick H. Keys ,  Seiyon Kim ,  Kelin J. Kuhn ,  Aaron D. Lilak ,  Rafael Rios ,  Mayank Sahni

发明人： Annalisa Cappellani ,  Stephen M. Cea ,  Tahir Ghani ,  Harry Gomez ,  Jack T. Kavalieros ,  Patrick H. Keys ,  Seiyon Kim ,  Kelin J. Kuhn ,  Aaron D. Lilak ,  Rafael Rios ,  Mayank Sahni

IPC分类号： H01L29/06 ,  H01L21/762

CPC分类号： H01L29/66818 ,  B82Y10/00 ,  H01L21/762 ,  H01L21/76216 ,  H01L27/1203 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/66795 ,  H01L29/775 ,  H01L29/785

摘要： Semiconductor devices with isolated body portions are described. For example, a semiconductor structure includes a semiconductor body disposed above a semiconductor substrate. The semiconductor body includes a channel region and a pair of source and drain regions on either side of the channel region. An isolation pedestal is disposed between the semiconductor body and the semiconductor substrate. A gate electrode stack at least partially surrounds a portion of the channel region of the semiconductor body.

摘要翻译： 描述具有隔离主体部分的半导体器件。 例如，半导体结构包括设置在半导体衬底之上的半导体本体。 半导体主体包括沟道区和沟道区两侧的一对源极和漏极区。 隔离基座设置在半导体本体和半导体衬底之间。 栅极电极堆叠至少部分地围绕半导体主体的沟道区域的一部分。

公开(公告)号：US06838329B2

公开(公告)日：2005-01-04

申请号：US10404878

申请日：2003-03-31

申请人： Cory E. Weber ,  Mark A. Armstrong ,  Stephen M. Cea ,  Giuseppe Curello ,  Sing-Chung Hu ,  Aaron D. Lilak ,  Max Wei

发明人： Cory E. Weber ,  Mark A. Armstrong ,  Stephen M. Cea ,  Giuseppe Curello ,  Sing-Chung Hu ,  Aaron D. Lilak ,  Max Wei

IPC分类号： H01L21/265 ,  H01L21/336 ,  H01L21/8238 ,  H01L29/167 ,  H01L29/36

CPC分类号： H01L21/26586 ,  H01L21/26506 ,  H01L21/2652 ,  H01L21/823807 ,  H01L21/823892 ,  H01L29/167 ,  H01L29/36 ,  H01L29/665 ,  H01L29/6656

摘要： A method and apparatus to form a high-concentration, indium-fluorine retrograde well within a substrate. The indium-fluorine retrograde well includes an indium concentration greater than about 3E18/cm3.

摘要翻译： 在衬底内形成高浓度的铟 - 氟逆行阱的方法和装置。 铟 - 氟逆行阱包括大于约3E18 / cm3的铟浓度。

公开(公告)号：US07129533B2

公开(公告)日：2006-10-31

申请号：US10750498

申请日：2003-12-31

申请人： Cory E. Weber ,  Mark A. Armstrong ,  Stephen M. Cea ,  Giuseppe Curello ,  Sing-Chung Hu ,  Aaron D. Lilak ,  Max Wei

发明人： Cory E. Weber ,  Mark A. Armstrong ,  Stephen M. Cea ,  Giuseppe Curello ,  Sing-Chung Hu ,  Aaron D. Lilak ,  Max Wei

IPC分类号： H01L29/80

CPC分类号： H01L21/26586 ,  H01L21/26506 ,  H01L21/2652 ,  H01L21/823807 ,  H01L21/823892 ,  H01L29/167 ,  H01L29/36 ,  H01L29/665 ,  H01L29/6656

摘要： A method and apparatus to form a high-concentration, indium-fluorine retrograde well within a substrate. The indium-fluorine retrograde well includes an indium concentration greater than about 3E18/cm3.

摘要翻译： 在衬底内形成高浓度的铟 - 氟逆行阱的方法和装置。 铟 - 氟逆行阱包括大于约3E18 / cm3的铟浓度。

公开(公告)号：US20230090092A1

公开(公告)日：2023-03-23

申请号：US17448382

申请日：2021-09-22

申请人： Aaron D. Lilak ,  Orb Acton ,  Cheng-Ying Huang ,  Gilbert Dewey ,  Ehren Mannebach ,  Anh Phan ,  Willy Rachmady ,  Jack T. Kavalieros

发明人： Aaron D. Lilak ,  Orb Acton ,  Cheng-Ying Huang ,  Gilbert Dewey ,  Ehren Mannebach ,  Anh Phan ,  Willy Rachmady ,  Jack T. Kavalieros

IPC分类号： H01L27/12 ,  H01L21/84

摘要： An integrated circuit having a transistor architecture includes a first semiconductor body and a second semiconductor body. The first and second semiconductor bodies are arranged vertically (e.g., stacked configuration) or horizontally (e.g., forksheet configuration) with respect to each other, and separated from one another by insulator material, and each can be configured for planar or non-planar transistor topology. A first gate structure is on the first semiconductor body, and includes a first gate electrode and a first high-k gate dielectric. A second gate structure is on the second semiconductor body, and includes a second gate electrode and a second high-k gate dielectric. In an example, the first gate electrode includes a layer comprising a compound of silicon and one or more metals; the second gate structure may include a silicide workfunction layer, or not. In one example, the first gate electrode is n-type, and the second gate electrode is p-type.

公开(公告)号：US20210057413A1

公开(公告)日：2021-02-25

申请号：US16954126

申请日：2018-03-28

申请人： Gilbert DEWEY ,  Ravi PILLARISETTY ,  Jack T. KAVALIEROS ,  Aaron D. LILAK ,  Willy RACHMADY ,  Rishabh MEHANDRU ,  Kimin JUN ,  Anh PHAN ,  Hui Jae YOO ,  Patrick MORROW ,  Cheng-Ying HUANG ,  Matthew V. METZ ,  Intel Corporation

发明人： Gilbert DEWEY ,  Ravi PILLARISETTY ,  Jack T. KAVALIEROS ,  Aaron D. LILAK ,  Willy RACHMADY ,  Rishabh MEHANDRU ,  Kimin JUN ,  Anh PHAN ,  Hui Jae YOO ,  Patrick MORROW ,  Cheng-Ying HUANG ,  Matthew V. METZ

IPC分类号： H01L27/092 ,  H01L21/822 ,  H01L29/08 ,  H01L29/78 ,  H01L21/8238 ,  H01L27/06 ,  H01L29/66 ,  H01L29/06

摘要： An integrated circuit structure comprises a lower device layer that includes a first structure comprising a plurality of PMOS transistors. An upper device layer is formed on the lower device layer, wherein the upper device layer includes a second structure comprising a plurality of NMOS transistors having a group III-V material source/drain region.