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    Transferring and resizing of epitaxial film arrays and method thereof
    4.
    发明授权
    Transferring and resizing of epitaxial film arrays and method thereof 有权
    外延膜阵列的转移和调整大小及其方法

    公开(公告)号：US08546237B2

    公开(公告)日：2013-10-01

    申请号：US12872609

    申请日：2010-08-31

    申请人： Majid Riaziat

    发明人： Majid Riaziat

    IPC分类号： H01L21/76

    CPC分类号： H01L21/7806 ,  H01L21/2007

    摘要： A method of transferring an epitaxial film from an original substrate to a destination substrate comprises: growing an epitaxial film grown with a sacrificial layer on the original substrate; patterning the epitaxial film into a plurality of sections; attaching the plurality of sections to a stretchable film; removing the plurality of sections attached to the stretchable film from the original substrate; stretching the sections apart as needed; and attaching a permanent substrate to the plurality of sections; and trimming the sizes of the sections as needed for precise positioning prior to integrated circuit device fabrication.

    摘要翻译： 将外延膜从原始衬底转移到目标衬底的方法包括：在原始衬底上生长用牺牲层生长的外延膜; 将外延膜图案化成多个部分; 将所述多个部分附接到可拉伸膜; 从原始基板去除附接到可拉伸膜的多个部分; 根据需要拉伸部分; 以及将永久基板附接到所述多个部分; 并且在集成电路器件制造之前根据需要修整各部分的尺寸以进行精确定位。

    Planarization of backside emitting VCSEL and method of manufacturing the same for array application
    10.
    发明授权
    Planarization of backside emitting VCSEL and method of manufacturing the same for array application 有权

    公开(公告)号：US11233377B2

    公开(公告)日：2022-01-25

    申请号：US16258976

    申请日：2019-01-28

    申请人： OEpic SEMICONDUCTORS, INC

    发明人： Yi-Ching Pao

    IPC分类号： H01S5/183 ,  H01S5/42 ,  H01S5/0234 ,  H01S5/042 ,  H01S5/026 ,  H01S5/0237 ,  H01S5/02345

    摘要： A method of forming a flip chip backside Vertical Cavity Surface Emitting Laser (VCSEL) package comprising: forming a VCSEL pillar array; applying a dielectric layer to the VCSEL pillar array, the dielectric layer filling trenches in between pillars forming the VCSEL pillar array and covering the pillars; planarizing the VCSEL pillar array to remove the dielectric layer covering the pillars exposing a metal layer on a top surface of the pillars; applying a metal coating on the metal layer on a top surface of the pillars, the metal layer defining a contact pattern of the VCSEL pillar array; and applying solder on the metal coating to flip chip mount the VCSEL pillar array to a substrate package.