公开(公告)号：US6025618A

公开(公告)日：2000-02-15

申请号：US747522

申请日：1996-11-12

Applicant: Zhi Quan Chen

Inventor： Zhi Quan Chen

IPC: G11B9/02 ,  G11C11/22 ,  H01L21/8246 ,  H01L23/48

CPC classification number: G11C11/22 ,  G11B9/02 ,  H01L27/11502 ,  H01L27/11507 ,  H01L2924/0002 ,  Y10T29/49126 ,  Y10T29/49128

Abstract: A method of fabricating a complex IC in two parts and making the electrical connections between them afterwards is described. By this method, a ferroelectric RAM is fabricated in two parts, where the first part has an array of unit cells each of those has a transistor or a group of transistors serving the purpose of selecting one address for data recording and has an array of electrically conductive pads facing upward, protruding out from the surface of the first part, where the second part consists of a data-recording layer on another substrate. The data-recording layer consists of ferroelectric material and is pressed on the first part during data writing and reading.

Abstract translation: 描述了两部分制造复合IC并且之后形成它们之间的电连接的方法。 通过这种方法，铁电RAM被制造成两部分，其中第一部分具有单元阵列阵列，每个单元阵列具有晶体管或一组晶体管，用于选择一个用于数据记录的地址，并且具有电气阵列 导电焊盘面向上，从第一部分的表面突出，其中第二部分由另一基板上的数据记录层组成。 数据记录层由铁电材料组成，并在数据写入和读取期间在第一部分被按压。