公开(公告)号：US20170345384A1

公开(公告)日：2017-11-30

申请号：US15238702

申请日：2016-08-16

Applicant: Wuhan China Star Optoelectronics Technology Co., Ltd.

Inventor： Liang Ma ,  Mang Zhao

IPC: G09G3/36

CPC classification number: G09G3/3688 ,  G09G3/20 ,  G09G3/3607 ,  G09G3/3648 ,  G09G2300/0426 ,  G09G2300/0452 ,  G09G2310/0275 ,  G09G2310/0289 ,  G09G2310/0291 ,  G09G2310/0297 ,  G09G2320/0219

Abstract: The present invention provides a demultiplex type display driving circuit, including: a plurality of drive units. Each drive unit comprises three demultiplex modules, and each demultiplex module includes two switch elements. The first switch element and the second switch element are controlled to be alternately on with the first branch control signal and the second branch control signal. The third branch control signal controls the two switch elements of the second and the third demultiplex modules to be alternately on to sequentially input the data signal to the first, the second, the third and the fourth data lines. Thus, division one to four of the data signal can be achieved with the three branch control signals. In comparison with prior art, the amount of the branch control signals is decreased, and meanwhile, the CMOS transmission gate is employed to be the switch element in the demultiplex modules.

公开(公告)号：US09818358B2

公开(公告)日：2017-11-14

申请号：US14888693

申请日：2015-09-29

Applicant: Shenzhen China Star Optoelectronics Technology Co., Ltd. ,  Wuhan China Star Optoelectronics Technology Co., Ltd.

Inventor： Caiqin Chen ,  Mang Zhao

IPC: G09G3/36

CPC classification number: G09G3/3677 ,  G09G2300/0809 ,  G09G2310/0243 ,  G09G2310/0281 ,  G09G2310/0286 ,  G09G2310/0291 ,  G09G2310/08

Abstract: The invention provides a scanning driving circuit and a liquid crystal display apparatus. The scanning driving circuit including a latch module to receive and calculate an upper level control signal, a first and a second clock signal and a reset signal to get a first control signal, and latch and output the first control signal; a logic control module receive and calculate the first and the second control signal and the third clock signal to get a logic control signal, and output the logic control signal; an output module receive and calculate the logic control signal and the second control signal to get and output a scanning driving signal, and a scan line connected to the output module to transmit the scanning driving signal to a pixel unit and to achieve the special function of the liquid crystal display apparatus.

公开(公告)号：US09799296B2

公开(公告)日：2017-10-24

申请号：US14913981

申请日：2015-12-22

Applicant: Wuhan China Star Optoelectronics Technology Co., Ltd.

Inventor： Mang Zhao

IPC: G09G3/36

CPC classification number: G09G3/3677 ,  G09G3/3696 ,  G09G2300/0408 ,  G09G2300/0819 ,  G09G2310/0286 ,  G09G2310/0291 ,  G09G2310/08 ,  G09G2330/021 ,  G11C19/28

Abstract: The invention provides a CMOS GOA circuit, by disposing a feedback regulation module (4) connected to output buffer module (3) and signal processing module (2) in the GOA unit, to achieve the following: when the scan driver signal (G(N)) becomes high, the positive feedback from the sixth N-type TFT (T6) of feedback regulation module (4) will enhance the pull-down capability of the signal processing module (2) to reduce the rising time of the scan driver signal (G(N)) waveform; when the scan driver signal (G(N)) becomes low, the positive feedback from the fifth P-type TFT (T5) of feedback regulation module (4) will enhance the pull-up capability of the signal processing module (2) to reduce the falling time of scan driver signal (G(N)) waveform; that is, the invention can reduce the RC loading of scan driver signal (G(N)) and improve the stability of high resolution display panel.

公开(公告)号：US09786240B2

公开(公告)日：2017-10-10

申请号：US14779016

申请日：2015-08-10

Applicant: WUHAN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO. LTD.

Inventor： Mang Zhao ,  Yong Tian ,  Shijuan Yi

IPC: G09G3/36 ,  G09G3/20 ,  G11C19/00

CPC classification number: G09G3/3677 ,  G09G3/20 ,  G09G2310/0267 ,  G09G2310/0286 ,  G09G2330/021 ,  G11C19/00 ,  G11C19/287

Abstract: A scan driving circuit is provided. The scan driving circuit for driving cascaded scan lines includes a scan driving circuit, a latch module, a driving-signal generation module, an output control module, a high gate voltage source, and a low level gate voltage. The scan driving circuit of the present invention conducts a driving operation for the latch module by a first cascade signal and a second cascade signal, so that a clock signal is not required to be processed with a phase inversion, and thereby the scan driving circuit has less overall power consumption.

公开(公告)号：US20170140723A1

公开(公告)日：2017-05-18

申请号：US14905966

申请日：2015-12-23

Applicant: WUHAN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD

Inventor： Mang Zhao

IPC: G09G3/36

CPC classification number: G09G3/3648 ,  G09G3/3677 ,  G09G2300/0408 ,  G09G2300/0439 ,  G09G2310/08

Abstract: A GOA substrate includes GOA circuit units connected in cascade. The GOA circuit unit includes an output module, a reset module, a latch module, and an input module. The output module is used for outputting the scan signal based on a trigger signal. The reset module is used for resetting the trigger signal based on the reset signal. The latch module is used to hold and pull down the electric potential of the trigger signal. The input module is used for receiving the scan signal outputted by the previous stage GOA circuit unit. The input module includes a first CMOS transmission gate and a first transistor. The input module can lower the equivalent on-resistance of the transistor, elevate the drive current between the input terminal and the output terminal, so to increase level transmission speed, lower drive power loss of the transistor and improve the stability of the circuit.

公开(公告)号：US20170103698A1

公开(公告)日：2017-04-13

申请号：US14778281

申请日：2015-04-03

Applicant: Shenzhen China Star Optoelectronics Technology Co., Ltd. ,  Wuhan China Star Optoelectronics Technology Co., Ltd.

Inventor： Juncheng Xiao ,  Mang Zhao

IPC: G09G3/20 ,  G09G3/36 ,  G11C19/28 ,  G09G3/3266

CPC classification number: G09G3/2085 ,  G09G3/3266 ,  G09G3/3674 ,  G09G3/3677 ,  G09G2230/00 ,  G09G2300/0408 ,  G09G2300/0833 ,  G09G2310/021 ,  G09G2310/0243 ,  G09G2310/0286 ,  G09G2310/08 ,  G11C19/28 ,  G11C19/287

Abstract: A gate drive circuit and a display device are provided. The present disclosure pertains to the technical field of display technology and solves the technical problem of wide frame of the existing display device. The shifting register is configured to output primary drive signal into a first follower and a second follower in consecutive first scanning period t1 and second scanning period t2. The first follower is configured to output gate drive signal to a first gate line in t1 under the driving of the primary drive signal; and the second follower is configured to output the gate drive signal to a second gate line in t2 under the driving of the primary drive signal. The present disclosure can be applied to display devices, such as liquid crystal display devices and OLED display devices, and the like.