Circuit and method for control of counter start time

    公开(公告)号:US11128307B2

    公开(公告)日:2021-09-21

    申请号:US16175586

    申请日:2018-10-30

    Abstract: An analog to digital conversion (ADC) circuit includes a ramp circuit coupled to output a ramp signal, and the ramp signal is offset from a starting voltage by an offset voltage. The ramp signal ramps towards the starting voltage. A counter circuit is coupled to the ramp circuit to start counting after the ramp signal returns to the starting voltage, and a comparator is coupled to the counter circuit and a bitline to compare the ramp signal to a pixel signal voltage on the bitline. In response to the ramp signal equaling the pixel signal voltage, the comparator stops the counter.

    Versatile image sensor circuit
    83.
    发明授权

    公开(公告)号:US10951840B1

    公开(公告)日:2021-03-16

    申请号:US16555796

    申请日:2019-08-29

    Abstract: A photodiode array circuit includes a plurality of photodiode circuits, binning circuitry, and a plurality of output circuits. Each of the plurality of photodiode circuits is coupled to receive a different one of the plurality of transfer control signals as a proximate photodiode circuit, proximate in a first direction. The binning circuitry is coupled to electrically connect the plurality of photodiode circuits into groups of photodiode circuit sense nodes in response to a binning control signal. Each of the plurality of output circuits is coupled to one of the groups of photodiode circuit sense nodes. Each of the plurality of output circuits are coupled to receive the output charge from the photodiode circuits in the one of the groups of photodiode circuit sense nodes and output an output signal to a bitline in response to the output charge and an row select signal.

    VERSATILE IMAGE SENSOR CIRCUIT
    84.
    发明申请

    公开(公告)号:US20210067714A1

    公开(公告)日:2021-03-04

    申请号:US16555796

    申请日:2019-08-29

    Abstract: A photodiode array circuit includes a plurality of photodiode circuits, binning circuitry, and a plurality of output circuits. Each of the plurality of photodiode circuits is coupled to receive a different one of the plurality of transfer control signals as a proximate photodiode circuit, proximate in a first direction. The binning circuitry is coupled to electrically connect the plurality of photodiode circuits into groups of photodiode circuit sense nodes in response to a binning control signal. Each of the plurality of output circuits is coupled to one of the groups of photodiode circuit sense nodes. Each of the plurality of output circuits are coupled to receive the output charge from the photodiode circuits in the one of the groups of photodiode circuit sense nodes and output an output signal to a bitline in response to the output charge and an row select signal.

    BIAS CIRCUIT FOR USE WITH DIVIDED BIT LINES
    85.
    发明申请

    公开(公告)号:US20200260031A1

    公开(公告)日:2020-08-13

    申请号:US16275092

    申请日:2019-02-13

    Abstract: An image sensor includes a pixel array including a plurality of pixels. Each pixel is coupled to generate image data in response to incident light. A bit line is coupled to a column of pixels of the pixel array and is separated into first and second portions. Each portion is coupled to a corresponding portion of rows of pixels of the pixel array. A readout circuit coupled to the bit line to read out the image data from the pixel array. The readout circuit includes a cascode device coupled between the first and second portions of the bit line. The cascode device is coupled to be biased to electrically separate the first and second portions of the bit line from one another such that a capacitance of each portion of the bit line does not affect a settling time of an other portion of the bit line.

    Small pixels having dual conversion gain providing high dynamic range

    公开(公告)号:US10510796B1

    公开(公告)日:2019-12-17

    申请号:US16008434

    申请日:2018-06-14

    Abstract: A group of shared pixels comprises: a first shared pixel comprising a first photodiode and a first transfer gate; a second shared pixel comprising a second photodiode and a second transfer gate; a third shared pixel comprising a third photodiode and a third transfer gate; a fourth shared pixel comprising a fourth photodiode and a first transfer gate; a first floating diffusion shared by the first shared pixel and the second shared pixel; a second floating diffusion shared by the third shared pixel and the fourth shared pixel; a capacitor coupled to the first floating diffusion through a first dual conversion gain transistor, and the second floating diffusion through a second dual conversion gain transistor; wherein the capacitor is formed in an area covering most of the first shared pixel, the second shared pixel, the third shared pixel, and the fourth shared pixel.

    CMOS IMAGE SENSOR WITH DIVIDED BIT LINES
    87.
    发明申请

    公开(公告)号:US20190268556A1

    公开(公告)日:2019-08-29

    申请号:US16222832

    申请日:2018-12-17

    Abstract: An image sensor includes a pixel array including a plurality of pixels. A bit line coupled to a column of pixels is separated in to a plurality of electrically portions that are coupled to corresponding portions of rows of the pixel array. A first switching circuit of a readout circuit is coupled to the bit line. A first switching circuit is configured to couple a bit line current source to the bit line to provide a DC current coupled to flow through the bit line and through the first switching circuit during a readout operation of a pixel coupled to the bit line. A second switching circuit is configured to couple and ADC to the bit line during the readout operation of the pixel. Substantially none of the DC current provided by the bit line current source flows through the second switching circuit during the readout operation of the pixel.

    Time of flight photosensor
    88.
    发明授权

    公开(公告)号:US10291895B2

    公开(公告)日:2019-05-14

    申请号:US15333653

    申请日:2016-10-25

    Abstract: A time of flight pixel cell includes a photosensor to sense photons reflected from an object and pixel support circuitry. The pixel support circuitry includes charging control logic coupled to the photosensor to detect when the photosensor senses the photons reflected from the object. The pixel support circuitry also includes a controllable current source coupled to provide a charge current in response to a time of flight signal coupled to be received from the charging control logic. A capacitor is coupled to receive the charge current from the controllable current source in response to the time of flight signal, and voltage on the capacitor is representative of a round trip distance to the object. A counter circuit is coupled to the photosensor to count a number of the photons reflected from the object and received by the photosensor.

    Bitline boost for fast settling with current source of adjustable bias

    公开(公告)号:US10116892B1

    公开(公告)日:2018-10-30

    申请号:US15853487

    申请日:2017-12-22

    Abstract: A photodiode is adapted to accumulate image charges in response to incident light. The accumulate image charges are transferred to a floating diffusion, amplified, row selected and the amplified row selected signal is output to a bitline. A bitline enable transistor is coupled to link between the bitline and a bitline source node. A current source is coupled to connect between the bitline source node and a ground. The current source generator sinks adjustable current from the bitline source node to the ground through a cascode transistor and a bias transistor. A cascode hold capacitor is coupled between the cascode control voltage and the ground. A bias hold capacitor is coupled between the bias control voltage and the ground. A bias boost driver is coupled to control the cascode control voltage and the bias control voltage.

    TIME OF FLIGHT PHOTOSENSOR
    90.
    发明申请

    公开(公告)号:US20180115762A1

    公开(公告)日:2018-04-26

    申请号:US15333653

    申请日:2016-10-25

    CPC classification number: H04N13/122 G01B11/24 G01S3/00 H04N13/254

    Abstract: A time of flight pixel cell includes a photosensor to sense photons reflected from an object and pixel support circuitry. The pixel support circuitry includes charging control logic coupled to the photosensor to detect when the photosensor senses the photons reflected from the object. The pixel support circuitry also includes a controllable current source coupled to provide a charge current in response to a time of flight signal coupled to be received from the charging control logic. A capacitor is coupled to receive the charge current from the controllable current source in response to the time of flight signal, and voltage on the capacitor is representative of a round trip distance to the object. A counter circuit is coupled to the photosensor to count a number of the photons reflected from the object and received by the photosensor.

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