METHOD FOR CONSTRUCTING CURVE OF ROBOT PROCESSING PATH OF PART WITH SMALL CURVATURE BASED ON POINT CLOUD BOUNDARY

    公开(公告)号:US20210173966A1

    公开(公告)日:2021-06-10

    申请号:US17059469

    申请日:2020-06-13

    摘要: The disclosure discloses a method for constructing actual processing curve of part with small curvature based on a point cloud boundary. The method includes: (a) encrypting a three-dimensional ordered boundary curve of a part to be processed; (b) fitting encrypted boundary points into a plane, and projecting each boundary point into the plane to obtain a projection point; (c) performing Euclidean cluster within the plane to obtain point sets, and fitting the obtained point sets into a straight line; (d) performing the Euclidean cluster on projection points that are not fitted into the straight line to obtain corner point sets, and fitting a sharp corner or a rounded corner of the corner point sets to obtain a fitted boundary curve within the plane; (e) mapping the fitted boundary curve to a curved surface of the three-dimensional ordered boundary curve to obtain an actual processing curve of the part to be processed.

    Financial Network
    73.
    发明申请

    公开(公告)号:US20210168064A1

    公开(公告)日:2021-06-03

    申请号:US17011479

    申请日:2020-09-03

    申请人: CFPH, LLC

    发明人: Jacob Loveless

    摘要: A network system that facilitates financial transactions. A software defined network may operate to provide a variety of trading related services to a variety of customers with a low latency. Core or processor affinity for routing processes may improve speeds of routing. Data capture through a shared memory space may allow for a variety of analytics without introducing unacceptable delay.

    Information processing device, resource allocation system, and resource allocation method

    公开(公告)号:US11010201B2

    公开(公告)日:2021-05-18

    申请号:US16464093

    申请日:2017-11-10

    发明人: Koichi Taniguchi

    摘要: An information processing device includes: a storage that stores execution reservation information transmitted from a user server, wherein the execution reservation information represents an execution reservation of acceptor servers that execute first tasks that have been encrypted and divided; and a processor that: receives a second task from the user server, encrypts and divides the second task to generate the first tasks, requests the acceptor servers to execute the generated first tasks based on the execution reservation information stored in the storage, receives first execution results from the acceptor servers, decrypts and combines the first execution results to generate a second execution result, and transmits the generated second execution result to the user server.

    Encryption device, encryption method, computer readable medium, and storage device

    公开(公告)号:US11005645B2

    公开(公告)日:2021-05-11

    申请号:US16061264

    申请日:2016-01-15

    IPC分类号: H04L9/06 G09C1/00 G06F16/00

    摘要: A data partition unit partitions character string data D into N pieces of element data w1, w2, . . . , wN from a front to an end of the character string data D. A partial character string generation unit generates a set A={A1, A2, . . . , AN} and an element Ai={(wi), (wiwi+1), . . . , (wiwi+1 . . . wN)} of the set A where i=1, . . . , N, from the element data w1, w2, . . . , wN. A position information assignment unit generates a set B={B1, B2, . . . , BN} and an element Bi={(i, wi, (i, wiwi+1), . . . , (i, wiwi+1 . . . wN)} of the set B by associating each of (wi), (wiwi+1), . . . , (wiwi+1 . . . wN) which are components of the element Ai with position information i. An encryption unit encrypts each of (i, wi), (i, wiwi+1), . . . , (i, wiwi+1 . . . wN) which are components included in the element Bi.

    Protecting analog circuits with parameter biasing obfuscation

    公开(公告)号:US10923442B2

    公开(公告)日:2021-02-16

    申请号:US15918278

    申请日:2018-03-12

    申请人: Drexel University

    摘要: A key based technique that targets obfuscation of critical circuit parameters of an analog circuit block by masking physical characteristics of a transistor (width and length) and the circuit parameters reliant upon these physical characteristics (i.e. circuit biasing conditions, phase noise profile, bandwidth, gain, noise figure, operating frequency, etc.). The proposed key based obfuscation technique targets the physical dimensions of the transistors used to set the optimal biasing conditions. The widths and/or lengths of a transistor are obfuscated and, based on an applied key sequence, provides a range of potential biasing points. Only when the correct key sequence is applied and certain transistor(s) are active, are the correct biasing conditions at the target node set.