Abstract:
A power supply system for providing power to a powered device over a communication link includes a power supply device capable of supporting an AC disconnect-detect function. The power supply device has a controller, an output port coupled to the communication link, and a bipolar junction transistor (BJT) controlled by the controller to provide power to the output port. The BJT may be turned off to present a high impedance required to support the AC disconnect-detection function.
Abstract:
A system is configured and a method is provided for receiving an input ratio represented by a first input signal and a second input signal, and producing an output ratio represented by a first output signal and a second output signal. The system is constructed and the method is provided for alternately operating in at least two time periods, wherein in one time period the first input signal, a low accuracy amplifier, and the first output signal are selectively coupled, and in another time period the input signal, the low accuracy amplifier, a high accuracy attenuator, and the second output signal are selectively coupled so as to maintain the output ratio proportional to the input ratio.
Abstract:
Switching regulator circuits and methods are provided for regulating output voltage that include an adjustable minimum peak inductor current level and adjustable burst comparator hysteresis for Burst Mode operation in switching regulators. Control over minimum peak inductor current level and burst comparator hysteresis is achieved during Burst Mode operation by allowing external user control of the burst threshold level and the burst comparator hysteresis. A single user-accessible input pin, two user-accessible input pins, or three user-accessible input pins may be used to distinguish between forced continuous and Burst Mode operations, set a burst threshold level, and set a burst comparator hysteresis during Burst Mode operation. The present invention may be applied to buck, boost, buck-boost, or any other suitable regulator circuit configuration. The present invention also may be employed with synchronous and non-synchronous switching regulators.
Abstract:
In one embodiment, an A/D converter samples an analog input signal voltage by applying the input signal to a first capacitor terminal, while a second capacitor terminal is connected to ground via an NMOS sampling switch, to charge the capacitor to the input signal voltage. During an analog-to-digital conversion process, the second capacitor terminal may swing in a voltage range that extends below ground. A controller circuit provides bias voltage signals to a gate terminal and to a p-well of the NMOS sampling switch, to selectively turn the sampling switch on and off. In a first step of a multi-step sampling process, the controller very quickly discharges the gate terminal to ground to isolate a quantity of charge on the second capacitor plate. In a subsequent step of the sampling process, the controller circuit applies a negative voltage to the gate terminal and p-well to ensure that the quantity of change is substantially preserved during the ensuing analog-to-digital conversion process.
Abstract:
Methods and apparatus for sampling an input voltage and apparatus incorporating the same are disclosed. An input voltage sampling apparatus includes a voltage sampling circuit coupled to the input voltage and configured to produce a sampled input voltage at an output terminal, and a voltage charging circuit coupled to the voltage sampling device and producing a first charged voltage on a first charged voltage output terminal and a second charged voltage on a second charged voltage output terminal. A voltage charging enabling circuit is coupled to the voltage charging circuit, the voltage sampling device via the first connection, and a power supply voltage. Further, the input voltage sampling apparatus includes a control circuit coupled to the voltage sampling circuit, the voltage charging circuit, and the power supply voltage, ground, third and fourth pulse signals. The first and third pulse signals are non-overlapping with the second and fourth pulse signals. The first pulse signal is delayed on the rising edge of the third pulse signal and the second pulse signal is delayed on the rising edge of the fourth pulse signal. The voltage sampling apparatus is capable of sampling an input voltage that is higher than the power supply voltage.
Abstract:
During burst mode operation of a four switch buck-boost converter, the input voltage and an output voltage can be detected and a preset peak charging current threshold level can be modulated when the difference between the input voltage and output voltage is within a prescribed range. A burst mode charging cycle will progress until the modulated peak charging threshold level is attained and cut off at the set peak level. A charge transfer cycle and discharge cycle may proceed thereafter.
Abstract:
A pulse width modulation circuit may generate an adjustable output signal that periodically transitions between a first and a second state with an adjustable duty cycle. A first pulse generator circuit may be configured to generate a first pulse signal that periodically transitions at an adjustable delay with respect to a periodic reference signal. A second pulse generator circuit may be configured to generate a second pulse signal that periodically transitions at an adjustable delay with respect to the periodic reference signal. A logic circuit may be configured to generate the adjustable output signal based on both the first and the second pulse signals.
Abstract:
A power supply system includes a regulator for receiving an input voltage and producing an output voltage, the regulator including an output device and a controller coupled to the regulator. The controller is configured to monitor at least one operating parameter of the output device and, in response, generate a control signal that adjusts the input voltage to a minimum input voltage needed to maintain the output device in saturation regardless of variation in the monitored operating parameter.
Abstract:
An integrated connecting device for coupling a communication link to a powered device (PD) in a system for supplying power to the PD over the communication link. The integrated connecting device has a housing configured for providing connection to the PD external with respect to the housing, communication interface circuitry coupled to the communication link for supporting data communication of the PD over the communication link, and power interface circuitry coupled to the communication interface circuitry for implementing a power supply protocol performed to supply power to the PD over the communication link. The communication interface circuitry and the power interface circuitry being held by the housing.
Abstract:
An LED driver circuit that includes a buck-mode boost converter that provides a regulated output current and that requires only a single connection to each channel of LEDs. The buck-mode boost controller may include a current regulator that includes an integrator. The current regulator may be configured to integrate a difference between a reference signal that is representative of the desired level of the average current through the electronic power switch and a detected signal that is representative of the actual current that is being delivered to the buck-mode boost circuit through the electronic power switch. The reference signal to the integrator may not change during operation of the buck-mode converter. The current regulator may be configured to deactivate the integrator and/or to disconnect the detected signal from the integrator while the electronic power switch is off.