ELECTRO-STATIC DISCHARGE PROTECTIVE CIRCUIT AND DISPLAY SUBSTRATE AND DISPLAY DEVICE HAVING THE SAME
    71.
    发明申请
    ELECTRO-STATIC DISCHARGE PROTECTIVE CIRCUIT AND DISPLAY SUBSTRATE AND DISPLAY DEVICE HAVING THE SAME 有权
    电静电放电保护电路和显示基板及其显示装置

    公开(公告)号:US20150303686A1

    公开(公告)日:2015-10-22

    申请号:US14310371

    申请日:2014-06-20

    Inventor: Yongqian Li

    CPC classification number: H01L27/0251 H01L27/0266 H02H9/046

    Abstract: The present invention relates to display technology. It discloses an electro-static discharge protective circuit comprising: a first thin film transistor having a first source electrode connected to a first reference level end, and a first gate electrode and a first drain electrode connected with each other at a first node; a second thin film transistor having a second source electrode connected to said first node, and a second gate electrode and a second drain electrode connected with each other at a discharge end; a third thin film transistor having a third source electrode connected to said discharge end, and a third gate electrode and a third drain electrode connected with each other at a second node, wherein said second node is connected with said first node; and a fourth thin film transistor having a fourth source electrode connected at said second node, and a fourth gate electrode and a fourth drain electrode connected to a second reference level end. The electro-static discharge protective circuit according to the present invention can reduce a risk of circuit breakdown and failure. Correspondingly, the present invention also discloses a display substrate and a display device having the abovementioned electro-static discharge protective circuit.

    Abstract translation: 本发明涉及显示技术。 它公开了一种静电放电保护电路,包括:第一薄膜晶体管,其具有连接到第一参考电平端的第一源电极和在第一节点处彼此连接的第一栅电极和第一漏电极; 第二薄膜晶体管,具有连接到所述第一节点的第二源电极,以及在放电端彼此连接的第二栅电极和第二漏电极; 第三薄膜晶体管,具有连接到所述放电端的第三源电极,以及在第二节点处彼此连接的第三栅电极和第三漏电极,其中所述第二节点与所述第一节点连接; 以及第四薄膜晶体管,其具有连接在所述第二节点处的第四源电极,以及连接到第二基准电平端的第四栅电极和第四漏电极。 根据本发明的静电放电保护电路可以降低电路故障和故障的风险。 相应地,本发明还公开了具有上述静电放电保护电路的显示基板和显示装置。

    DISPLAY SUBSTRATE AND DISPLAY DEVICE

    公开(公告)号:US20250098447A1

    公开(公告)日:2025-03-20

    申请号:US18558248

    申请日:2022-10-28

    Abstract: A display substrate and a display device are provided. The display substrate includes: a base substrate, data lines and sub-pixels on the base substrate. The sub-pixels include a sub-pixel driving circuit and a light-emitting element including a first electrode. The sub-pixel driving circuit includes a driving transistor and a data writing transistor having a first electrode coupled to the data line through a second connection structure. A second electrode of the driving transistor is coupled to the first electrode through a first connection structure. The first and second connection structures are in a non-aperture region of the sub-pixel. Orthographic projections of the first and second connection structures onto the base substrate are arranged along a first direction. An orthographic projection of the second connection structure onto the base substrate and an aperture region of the sub-pixel are along a second direction which intersects the first direction.

    Display substrate and display device

    公开(公告)号:US12219827B2

    公开(公告)日:2025-02-04

    申请号:US17795447

    申请日:2021-08-25

    Abstract: A display substrate and a display device. The display substrate includes a base substrate, and a plurality of pixel units and a plurality of scanning lines on the base substrate. Each pixel unit includes a plurality of sub-pixels and a light shielding layer, the plurality of sub-pixels is arranged in sequence in a first direction, each sub-pixel includes a sub-pixel driving circuitry and a light-emitting element coupled to each other, and the sub-pixel driving circuitry is configured to provide a driving signal to the light-emitting element. At least a part of the light shielding layer is arranged between the sub-pixel driving circuitry and the base substrate. Each scanning line includes at least a part extending in the first direction, is coupled to a corresponding sub-pixel driving circuitry, and is arranged at a same layer as the light shielding layer.

    Array Substrate and Display Panel
    76.
    发明申请

    公开(公告)号:US20250022887A1

    公开(公告)日:2025-01-16

    申请号:US18549038

    申请日:2022-10-31

    Abstract: The present disclosure relates to an array substrate and a display panel, the array substrate including at least one pixel unit and a first gate line, each pixel unit including at least one sub-pixel, each sub-pixel including a pixel circuit, the pixel circuit including a first transistor, the first gate line being electrically connected to a gate of the first transistor through a first connecting part, the first connecting part and the first gate line being located in different conductive layers from each other. The array substrate provided in some embodiments of the present disclosure eliminates the risk of pixel circuit transistor damage caused by electrostatic conduction of the gate line by means of the measure of same layer separation and cross layer connection of the gate of the transistor and the corresponding gate line.

    Display substrate and display apparatus

    公开(公告)号:US12183278B2

    公开(公告)日:2024-12-31

    申请号:US17779576

    申请日:2021-07-21

    Abstract: A display substrate includes an underlay substrate and a plurality of pixel unit groups. The plurality of pixel unit groups are located in a display region of the underlay substrate. At least one pixel unit group includes a plurality of sub-pixel groups, wherein at least one sub-pixel group includes a pixel circuit. The pixel circuit includes a first sub-pixel circuit, a second sub-pixel circuit, and a light emitting control sub-circuit. The first sub-pixel circuit and the second sub-pixel circuit are both electrically connected to the light emitting control sub-circuit. The light emitting control sub-circuit is configured to control a first light emitting element electrically connected to the first sub-pixel circuit to emit light, and to control a second light emitting element electrically connected to the second sub-pixel circuit to emit light.

    Shift register and method for driving the same, gate driving circuit, and display device

    公开(公告)号:US12080364B2

    公开(公告)日:2024-09-03

    申请号:US17791597

    申请日:2020-12-26

    CPC classification number: G11C19/287 G09G2310/0286

    Abstract: A shift register includes a first scan unit including a first input circuit and a first output circuit, and a second scan unit including a second input circuit, a second output circuit, and a potential boost circuit. The first input circuit is configured to transmit an input signal to a first pull-up node. The first output circuit is configured to, under a control of a voltage of the first pull-up node, output a shift signal and a first scan signal. The second input circuit is configured to transmit the input signal to a second pull-up node. The second output circuit is configured to output a second scan signal under a control of a voltage of the second pull-up node. The potential boost circuit is configured to boost the voltage of the second pull-up node in cooperation with the second output circuit.

    Shift register unit, gate driving circuit, display device, and driving method

    公开(公告)号:US12014668B2

    公开(公告)日:2024-06-18

    申请号:US18173190

    申请日:2023-02-23

    Abstract: A shift register unit, a gate driving circuit, a display device, and a driving method are disclosed. The shift register unit includes a blanking unit, a first transmission circuit and a first input-output unit. The blanking unit is configured to charge a pull-up control node in response to a compensation selection control signal and input a blanking pull-up signal to a blanking pull-up node. The first transmission circuit is electrically connected to the blanking pull-up node and the first pull-up node; and the first input-output unit includes a first leakage preventing structure, the first leakage preventing structure is electrically connected to the first pull-up node and a first leakage preventing node respectively, and the leakage preventing structure is configured to control a level of the first leakage preventing node under the control of the level of the first pull-up node to prevent the first pull-up node from leaking.

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