Single-ended balance-coded interface with embedded-timing
    61.
    发明授权
    Single-ended balance-coded interface with embedded-timing 有权
    具有嵌入式时序的单端平衡编码接口

    公开(公告)号:US07053802B2

    公开(公告)日:2006-05-30

    申请号:US10830505

    申请日:2004-04-22

    CPC classification number: H03M5/06 H03M7/46

    Abstract: An interface includes an encoder to receive a stream of input symbols and, in response, to output a corresponding stream of output symbols of substantially equal weight via multiple signal lines, which can improve noise/speed performance. The encoder outputs the stream of output symbols so that no output symbol is consecutively repeated. A repeat symbol is used to indicate that the current symbol is identical to the immediately preceding symbol. This encoding allows an interface receiving the stream of output symbols can extract a clock signal from the stream.

    Abstract translation: 接口包括用于接收输入符号流的编码器,并且作为响应,经由多个信号线输出基本相等权重的对应的输出符号流,这可以改善噪声/速度性能。 编码器输出输出符号流,使得不输出符号被连续重复。 重复符号用于表示当前符号与前一个符号相同。 该编码允许接收输出符号流的接口可以从流中提取时钟信号。

    Stochastic DC control
    62.
    发明授权
    Stochastic DC control 失效
    随机DC控制

    公开(公告)号:US07038599B2

    公开(公告)日:2006-05-02

    申请号:US10510303

    申请日:2003-04-10

    CPC classification number: H03M5/145 G11B20/1426 G11B2020/1453

    Abstract: When recording data on a record carrier of the DC content of the data recorded is important in order to allow accurate reproduction of the data. The Digital Sum Value represents the DC content; the Digital Sum Value can be controlled by replacing code words at the output of an encoder by code words that can never occur during encoding. The replacement code word has different parity than the code word it replaces. The resulting stream of code words is subsequent encoded using an NRZI coder, so that the change in parity resulting from replacement code word results in a change of polarity of the NRZI output. The replacement code word can thus be used to change the polarity of the NRZI output to keep the Digital Sum Value low.

    Abstract translation: 在记录的数据的DC内容的记录载体上记录数据是重要的,以便准确地再现数据。 数字和值表示DC内容; 数字和值可以通过在编码期间通过在编码期间永远不会发生的代码字替换编码器的输出端的代码字来进行控制。 替代代码字与其替代的代码字具有不同的奇偶校验。 所得到的码字流使用NRZI编码器进行后续编码,使得由替换码字产生的奇偶校验变化导致NRZI输出极性的改变。 因此,替代码字可以用于改变NRZI输出的极性,以保持数字和值低。

    Data modulating method and apparatus, data demodulating method and apparatus, and code arranging method

    公开(公告)号:US07034719B2

    公开(公告)日:2006-04-25

    申请号:US10667670

    申请日:2003-09-23

    CPC classification number: G11B20/1426 H03M5/145

    Abstract: In a data demodulating method and apparatus, and a code arranging method, a multiplexer multiplexes an input data stream divided by a predetermined length into a plurality of types of pseudo random data streams using multiplexed information of predetermined bits by applying a predetermined multiplexing method to each of the pseudo random data streams. An encoder RLL-modulates the plurality of types of pseudo random data streams to create a modulated code stream including a minimum of DC components. The multiplexer generates the random data streams by inconsecutively scrambling the input data stream using the multiplexed information. The encoder weak DC-free RLL-modulates each of the multiplexed data streams without using a DC control sub code conversion table to which additional bits are added and provides a code stream including a minimum of DC components among multiplexed, RLL-modulated code streams.

    Fast look-ahead path modulation apparatus
    64.
    发明授权
    Fast look-ahead path modulation apparatus 失效
    快速前行路径调制装置

    公开(公告)号:US07026963B1

    公开(公告)日:2006-04-11

    申请号:US11080515

    申请日:2005-03-16

    CPC classification number: H03M5/145 G11B20/1426

    Abstract: A fast look-ahead path modulation apparatus, used in a recording medium modulation apparatus, reduces computation time during its look-ahead path modulation procedure. It is based on different selection criteria of predetermined states, paths and characteristics of modulation. Accordingly, the apparatus drastically reduces the amount of computation in a regular look-ahead path modulation apparatus. It also reduces hardware costs of the recording medium modulation apparatus and increases efficiency.

    Abstract translation: 在记录介质调制装置中使用的快速前行路径调制装置在其前视路径调制过程中减少了计算时间。 它基于预定状态,路径和调制特性的不同选择标准。 因此,该装置大大减少了规则的前视路径调制装置中的计算量。 还降低了记录介质调制装置的硬件成本,提高了效率。

    GENERATING AND SEARCHING COMPRESSED DATA
    65.
    发明申请
    GENERATING AND SEARCHING COMPRESSED DATA 有权
    生成和搜索压缩数据

    公开(公告)号:US20050155059A1

    公开(公告)日:2005-07-14

    申请号:US11050128

    申请日:2005-02-03

    Abstract: Data destined for a client is compressed at a server in a manner that produces a compressed data string that can be searched in its compressed state. The server constructs a code table that assigns codes from a standard code set (e.g., ASCII code set) that are normally unused to selected character pairs in the data string (e.g., the most frequently occurring character pairs). During compression, the selected character pairs are replaced with the corresponding codes. Identifiers are inserted into the compressed data string to separate substrings. To search the compressed data string at the client, a search query is compressed and compared to the compressed substrings. The substring identifiers are used to quickly locate each successive compressed substring. When a match is found, the matching substring is decompressed by replacing the code in the compressed substring with the corresponding character pair in the code table.

    Abstract translation: 以服务器的方式压缩发往客户端的数据,从而产生可以在压缩状态下进行搜索的压缩数据串。 服务器构造一个代码表,该代码表将通常未被使用的标准代码集(例如,ASCII代码集)的代码分配给数据串中的所选字符对(例如,最常出现的字符对)。 在压缩期间,所选择的字符对将被替换为相应的代码。 将标识符插入到压缩数据字符串中以分隔子字符串。 要搜索客户端上的压缩数据字符串,搜索查询将被压缩并与压缩的子字符串进行比较。 子字符串标识符用于快速定位每个连续的压缩子字符串。 当找到匹配项时,通过用压缩子字符串中的代码替换代码表中相应的字符对来解压缩匹配的子字符串。

    Modulation apparatus and method and DSV control bit generation method
    66.
    发明授权
    Modulation apparatus and method and DSV control bit generation method 失效
    调制装置和方法以及DSV控制位产生方法

    公开(公告)号:US06914544B2

    公开(公告)日:2005-07-05

    申请号:US10471675

    申请日:2003-01-22

    CPC classification number: G11B20/1426 H03M5/145

    Abstract: A modulation apparatus and method for more accurately determining a value of a control bit to be inserted into a data sequence and digital sum value (DSV) control bit generating method in which a data conversion unit supplies modulation-delimiter information including information regarding delimiters of modulation of a data sequence based on a conversion table to a modulation-delimiter detecting unit and supplies to a valid-delimiter detecting unit a DSV-segment-delimiter signal including information regarding a delimiter position of a DSV segment of the data sequence having the DSV control bit. The modulation-delimiter detecting unit detects modulation-delimiter positions based on the modulation-delimiter information supplied thereto and supplies a modulation-delimiter signal to the valid-delimiter detecting unit. The valid-delimiter detecting unit, based on the DSV-segment-delimiter signal supplied thereto, detects a valid-delimiter position for controlling timing for determining a DSV control bit of the relevant DSV segment from the modulation-delimiter positions represented by the modulation-delimiter signal supplied thereto.

    Abstract translation: 一种用于更精确地确定要插入到数据序列中的控制位的值的调制装置和方法以及数字和值(DSV)控制位产生方法,其中数据转换单元提供包括关于调制定界符的信息的调制分隔符信息 将基于转换表的数据序列发送到调制分隔符检测单元,并向有效定界符检测单元提供包括关于具有DSV控制的数据序列的DSV段的定界符位置的信息的DSV段分隔符信号 位。 调制分隔符检测单元根据提供给其的调制分隔符信息来检测调制分隔符位置,并将调制分隔符信号提供给有效分隔符检测单元。 有效定界符检测单元基于提供给其的DSV段分隔符信号,从由调制分隔符表示的调制分隔符位置检测用于控制用于确定相关DSV段的DSV控制位的定时的有效分隔符位置, 分隔符信号。

    Encoding apparatus and method, recording medium and program
    67.
    发明授权
    Encoding apparatus and method, recording medium and program 失效
    编码装置和方法,记录媒体和程序

    公开(公告)号:US06891483B2

    公开(公告)日:2005-05-10

    申请号:US10799893

    申请日:2004-03-10

    CPC classification number: H03M5/145 G11B20/1426 G11B2020/1457

    Abstract: A code sequence is encoded using a code conversion table in which the parity of the code sequence varies until the code states become equal to each other. The code word assignment used in this code conversion table is such that the decoded code word constraint length is 3 blocks and q0≠q1 for an arbitrary information sequence is satisfied even if a DC control bit is inserted at any of the first and second bits of an information word. Code states s0 and s1 when information sequences d0 and d1 resulted from insertion of provisional DC control bits 1 and 0 inserted at the top of an information sequence “1, 1, 0, 0, 0, 1, 0” are encoded starting with a state 3 according to a predetermined code conversion table are equal to each other, namely, s0=s1=6, in a third block, and two's complement q0 of a sum of code sequences c0 up to a time when the code states are equal to each other is “0” while two's complement q1 of a sum of code sequences c1 up to that time is “1”. That is, the condition that q0≠q1 is met. The code sequence can be applied to a recorder/player or encoder.

    Abstract translation: 代码序列使用代码转换表进行编码,其中代码序列的奇偶校验变化,直到代码状态变得彼此相等。 在该代码转换表中使用的代码字分配使得解码码字约束长度为3个块,并且对于任意的信息序列满足q个0,1 即使在信息字的第一和第二位中的任一位插入DC控制位。 当通过插入临时DC控制产生信息序列d 0和d 1时,代码状态为0 1 插入在信息序列“1,1,0,0,0,1,0”的顶部的比特1和0从根据预定代码转换表的状态3开始被编码,彼此相等,即s 在第三块中,代码序列c 0的总和的二进制补码q <0> / SUB>直到代码状态彼此相等的时间为“0”,而代码序列c 1的总和的2的补码q <1> 直到那个 时间是“1”。 也就是说,满足q <0> <> q <1>的条件。 代码序列可以应用于记录器/播放器或编码器。

    Code generation and allocation method
    68.
    发明授权
    Code generation and allocation method 有权
    代码生成和分配方法

    公开(公告)号:US06859152B2

    公开(公告)日:2005-02-22

    申请号:US10787156

    申请日:2004-02-27

    CPC classification number: G11B20/1426 G11B2020/1457 H03M5/145 H03M7/46

    Abstract: A method of generating and allocating codewords includes allocating one of two selectable codewords b1 and b2 as codeword “b” when a preceding codeword “a” and a following codeword “b” form a code stream X, in which the codewords b1 and b2 have opposite INV values which are parameters indicating whether the number of ‘1s’ contained in a codeword is an odd number or an even number. When the code stream of the preceding codeword “a” and the following codeword b1 is X1, and when the code stream of the preceding codeword “a” and the following codeword b2 is X2, the codewords are allocated such that the INV values of X1 and X2 are maintained to be opposite when the preceding codeword “a” or the following codeword b1 (b2) (b1 or b2) should be replaced by another codeword in compliance with a predetermined boundary condition given between codewords. The codewords are allocated so that a DC suppression capability of the code stream can be maintained.

    Abstract translation: 一种产生和分配码字的方法包括:当前一个码字“a”和随后的码字“b”形成码流X时,将两个可选码字b1和b2之一分配为码字“b”,其中码字b1和b2具有 相反的INV值,其是指示码字中包含的“1”的数目是奇数还是偶数的参数。 当前一个码字“a”的码流和随后的码字b1为X1时,当前一个码字“a”和随后的码字b2的码流为X2时,分配码字,使得X1的INV值 并且当前面的码字“a”或者随后的码字b1(b2)(b1或b2)应该被替换为符合在码字之间给定的预定边界条件的另一码字时,X2被维持为相反。 分配码字使得能够维持码流的DC抑制能力。

    Digital sum variation computation method and system
    69.
    发明授权
    Digital sum variation computation method and system 有权
    数字和变异计算方法和系统

    公开(公告)号:US06853684B2

    公开(公告)日:2005-02-08

    申请号:US10370261

    申请日:2003-02-19

    Abstract: A digital sum variation (DSV) computation method and system is proposed, which is capable of determining the DSV value of a bit stream of channel-bit symbols to thereby find the optimal merge-bit symbol for insertion between each succeeding pair of the channel-bit symbols. This DSV computation method and system is characterized in the use of a Zero Digital Sum Variation (ZDSV) principle to determine the DSV. This DSV computation method and system can find the optimal merge-bit symbol for insertion between each succeeding pair of the channel-bit symbols in a more cost-effective manner with the need for a reduced amount of memory and utilizes a lookup table requiring a reduced amount of memory space for storage so that memory space can be reduced as compared to the prior art. This DSV computation method and system is therefore more advantageous to use than the prior art.

    Abstract translation: 提出了一种数字和变化(DSV)计算方法和系统,其能够确定信道位符号的比特流的DSV值,从而找到用于在每个后续的信道对符号对之间插入的最佳合并位符号, 位符号。 该DSV计算方法和系统的特征在于使用零数值和变化(ZDSV)原理来确定DSV。 该DSV计算方法和系统可以以更具成本效益的方式找到用于在每个后续对的通道位符号之间插入的最佳合并位符号,并需要减少的存储量,并且使用需要减少的查找表 用于存储的存储空间量使得与现有技术相比可以减少存储空间。 因此,该DSV计算方法和系统比现有技术更有利于使用。

    Input data conversion method, input data conversion program, and input data conversion system
    70.
    发明授权
    Input data conversion method, input data conversion program, and input data conversion system 失效
    输入数据转换方法,输入数据转换程序和输入数据转换系统

    公开(公告)号:US06844832B2

    公开(公告)日:2005-01-18

    申请号:US10155498

    申请日:2002-05-24

    Applicant: Yuji Koike

    Inventor: Yuji Koike

    CPC classification number: G06F17/30569

    Abstract: An input module (30) notifies a module manager (21) of the output data format of the input module, and the module manager (21) generates a first data conversion module (31) based on the notification and joins the data conversion module to the end of a pipeline. The data conversion module (31) notifies the module manager (21) of the output data format of the data conversion module, and the module manager (21) generates a second data conversion module (32) based on the notification and joins the data conversion module to the end of the pipeline. The operation is repeated as many times as the number of multiplexing stages of multiplexed input data and an output module is joined to the termination position of the pipeline.

    Abstract translation: 输入模块(30)向模块管理器(21)通知输入模块的输出数据格式,模块管理器(21)根据该通知生成第一数据转换模块(31),并将数据转换模块 管道的末端。 数据转换模块(31)向模块管理器(21)通知数据转换模块的输出数据格式,模块管理器(21)根据该通知产生第二数据转换模块(32),并加入数据转换 模块到管道的末端。 该操作重复多次复用输入数据的复用级数,并且输出模块连接到管线的终止位置。

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