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公开(公告)号：US20230283928A1
公开(公告)日：2023-09-07
申请号：US18314748
申请日：2023-05-09
Applicant: OMNIVISION TECHNOLOGIES, INC.
Inventor： Zhe Gao , Tiejun Dai , Ling Fu , Qing Qin , Andreas Suess
IPC: H04N25/772 , H01L27/146 , H04N25/75 , H04N25/79 , H04N25/443 , H04N25/445
CPC classification number: H04N25/772 , H01L27/14612 , H01L27/1463 , H04N25/75 , H04N25/79 , H04N25/443 , H04N25/445
Abstract: An optical sensor includes a pixel array of pixel cells. Each pixel cell includes photodiodes to photogenerate charge in response to incident light and a source follower to generate an image data signal in response to the charge photogenerated from the photodiodes. An image readout circuit is coupled to the pixel cells to read out the image data signal generated from the source follower of at least one of the pixel cells of a row of the pixel array. An event driven circuit is coupled to the pixel cells to read out the event data signals generated in response to the charge from the photodiodes of another row of the pixel cells of the pixel array. The image readout circuit is coupled to read out the image data signal and the event driven circuit is coupled to read out the event data signals from pixel array simultaneously.
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公开(公告)号：US11716547B2
公开(公告)日：2023-08-01
申请号：US17530316
申请日：2021-11-18
Applicant: OMNIVISION TECHNOLOGIES, INC.
Inventor： Zhe Gao , Ling Fu , Yu-Shen Yang , Tiejun Dai
Abstract: A switch driver circuit includes a plurality of pullup transistors. The plurality of pullup transistors includes a first pullup transistor coupled between a voltage supply and a first output node. A plurality of pulldown transistors includes a first pulldown transistor coupled between the first output node and a ground node. A slope control circuit is coupled to the ground node. A plurality of global connection switches includes a first global connection switch coupled between the first output node and the slope control circuit.
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公开(公告)号：US11430828B2
公开(公告)日：2022-08-30
申请号：US17125619
申请日：2020-12-17
Applicant: OMNIVISION TECHNOLOGIES, INC.
Inventor： Zhe Gao , Ling Fu , Qing Qin , Tiejun Dai
IPC: H04N5/351 , H04N5/374 , H04N5/378 , H04N5/262 , H01L27/146 , H04N5/3745
Abstract: An event driven sensor includes an arrangement of photodiodes including an inner portion laterally surrounded by an outer portion. An outer pixel cell circuit is coupled to generate an outer pixel value in response to photocurrent generated by the outer portion. The outer pixel value is a binned signal representative of an average value of brightness of incident light on the arrangement of photodiodes. An inner pixel cell circuit is coupled to the inner portion to generate an inner pixel value in response to photocurrent generated by from the inner portion. An event driven circuit is coupled to the outer pixel cell circuit and the inner pixel cell circuit. The event driven circuit is coupled to generate an output signal responsive to an inner brightness indicated by the inner pixel value relative to an outer brightness indicated by the outer pixel value.
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公开(公告)号：US20220201236A1
公开(公告)日：2022-06-23
申请号：US17125630
申请日：2020-12-17
Applicant: OMNIVISION TECHNOLOGIES, INC.
Inventor： Zhe Gao , Tiejun Dai , Ling Fu , Qing Qin , Andreas Suess
IPC: H04N5/3745 , H01L27/146
Abstract: An optical sensor includes a pixel array of pixel cells. Each pixel cell includes photodiodes to photogenerate charge in response to incident light and a source follower to generate an image data signal in response to the charge photogenerated from the photodiodes. An image readout circuit is coupled to the pixel cells to read out the image data signal generated from the source follower of at least one of the pixel cells of a row of the pixel array. An event driven circuit is coupled to the pixel cells to read out the event data signals generated in response to the charge from the photodiodes of another row of the pixel cells of the pixel array. The image readout circuit is coupled to read out the image data signal and the event driven circuit is coupled to read out the event data signals from pixel array simultaneously.
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公开(公告)号：US11252346B1
公开(公告)日：2022-02-15
申请号：US17037282
申请日：2020-09-29
Applicant: OMNIVISION TECHNOLOGIES, INC.
Inventor： Tiejun Dai , Zhe Gao , Ling Fu
IPC: H04N5/341 , H04N5/369 , H01L27/146 , H04N5/378
Abstract: Switching techniques for fast voltage settling in image sensors are described. In one embodiment, a transfer gate (TX) driver circuit of an image sensor includes a TX driver configured to provide a TX driver voltage to a plurality of pixels of an image sensor. A power supply (NVDD) is operationally coupled to the TX driver. A first switch (SW1) operationally coupling an outside capacitance (Cext) and the TX driver. A second switch (SW2) operationally coupling the Cext and the NVDD. A third switch (SW3) operationally coupling the NVDD and the TX driver. A falling edge of the TX driver voltage is configured to control a start of data transfer from individual pixels of the plurality of pixels. The SW1 and the SW2 are configured in an open position before the falling edge of the TX driver voltage. The SW3 is configured in a closed position before the falling edge.
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Patent Agency Ranking
公开(公告)号：US11212457B2
公开(公告)日：2021-12-28
申请号：US16886473
申请日：2020-05-28
Applicant: OMNIVISION TECHNOLOGIES, INC.
Inventor： Tiejun Dai , Keiji Mabuchi , Zhe Gao
IPC: H04N5/235 , H01L27/146 , H04N5/345 , H01L27/092 , H04N5/378
Abstract: A pixel cell includes a first subpixel and a plurality of second subpixels. Each subpixel includes a photodiode to photogenerate image charge in response to incident light. Image charge is transferred from the first subpixel to a floating diffusion through a first transfer transistor. Image charge is transferred from the plurality of second subpixels to the floating diffusion through a plurality of second transfer transistors. An attenuation layer is disposed over the first subpixel. The first subpixel receives the incident light through the attenuation layer. The plurality of second subpixels receive the incident light without passing through the attenuation layer. A dual floating diffusion (DFD) transistor is coupled to the floating diffusion. A capacitor is coupled to the DFD transistor.
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公开(公告)号：US11102422B2
公开(公告)日：2021-08-24
申请号：US16431887
申请日：2019-06-05
Applicant: OmniVision Technologies, Inc.
Inventor： Chengming Liu , Tiejun Dai , Richard Mann
IPC: H04N5/235 , H04N5/3745 , H04N5/355
Abstract: A method for capturing a high-dynamic-range image includes: (i) storing a plurality of pixel values representing a first image captured by an image sensor that includes a pixel array, each pixel value having been generated by a respective pixel of a pixel subarray of the pixel array, each pixel being set to one of N1 first exposure values, N1≥1; (ii) determining an exposure-count N2 based on the plurality of pixel values; (iii) setting each pixel to one of a second plurality of exposure values, N2 in number, such that, for each of the second plurality of exposure values, at least one pixel is set to that exposure value, one of the second plurality of exposure values differing from each of the N1 first exposure values by more than a threshold value; and after setting (iv), capturing a second image with the image sensor.
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公开(公告)号：US11064134B2
公开(公告)日：2021-07-13
申请号：US16558499
申请日：2019-09-03
Applicant: OmniVision Technologies, Inc.
Inventor： Chengming Liu , Tiejun Dai , Richard Mann
Abstract: An image sensor includes a pixel array, and a first, second, and an intermediate memory-element. The memory-elements store, respectively, a first, second, and an intermediate exposure value. The pixel array includes pixel-subarrays each including a rescue pixel and a first, second, and third plurality of contiguous pixels. Each of the first plurality of pixels is connected to the first memory-element and spans diagonally-opposite corners of the pixel-subarray. Each of the second plurality of pixels is connected to the second memory-element and located on a first side of the first plurality of pixels. Each of the third plurality of pixels is connected to the second memory-element and located on a second side of the first plurality of pixels. The rescue-pixel is connected to the intermediate memory-element and is (i) located on one of the first side and the second side and/or (ii) adjacent to one of the first plurality of pixels.
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公开(公告)号：US20190386057A1
公开(公告)日：2019-12-19
申请号：US16008434
申请日：2018-06-14
Applicant: OmniVision Technologies, Inc.
Inventor： Rui Wang , Zheng Yang , Hiroaki Ebihara , Tiejun Dai
IPC: H01L27/146
Abstract: A group of shared pixels comprises: a first shared pixel comprising a first photodiode and a first transfer gate; a second shared pixel comprising a second photodiode and a second transfer gate; a third shared pixel comprising a third photodiode and a third transfer gate; a fourth shared pixel comprising a fourth photodiode and a first transfer gate; a first floating diffusion shared by the first shared pixel and the second shared pixel; a second floating diffusion shared by the third shared pixel and the fourth shared pixel; a capacitor coupled to the first floating diffusion through a first dual conversion gain transistor, and the second floating diffusion through a second dual conversion gain transistor; wherein the capacitor is formed in an area covering most of the first shared pixel, the second shared pixel, the third shared pixel, and the fourth shared pixel.
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公开(公告)号：US10110837B2
公开(公告)日：2018-10-23
申请号：US15446711
申请日：2017-03-01
Applicant: OMNIVISION TECHNOLOGIES, INC.
Inventor： Yingkan Lin , Tiejun Dai , Cheng-Pin Lin , Yu-Shen Yang
Abstract: Methods and apparatuses for data transmission in an image sensor are disclosed herein. An example data transmission circuit may include a plurality of transmission banks coupled in series with a first one of the plurality of transmission banks coupled to function logic, where each of the plurality of transmission banks are coupled to provide image data to a subsequent transmission bank in a direction toward the function logic in response to a clock signal, a plurality of delays coupled in series, wherein each of the plurality of delays is associated with and coupled to a respective transmission bank of the plurality of transmission banks, and wherein the clock signal is received by each of the plurality of transmission banks after being delayed by a respective number of delays of the plurality of delays in relation to the function logic.
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