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公开(公告)号：US20210049964A1
公开(公告)日：2021-02-18
申请号：US16856803
申请日：2020-04-23
Inventor： Zhidong Yuan , Yongqian Li , Can Yuan , Chao Jiao
IPC: G09G3/3258
Abstract: The present disclosure discloses a pixel circuit and a method of controlling the same. The pixel circuit includes: a light-emitting control sub-circuit, configured to transmit a data voltage at a data signal terminal to a first node under control of a first control terminal; a driving sub-circuit, configured to transmit a first power supply voltage at a first power supply terminal VDD to a second node N2 under control of a voltage at the first node; a first sensing sub-circuit, configured to maintain a voltage at the second node to be at a fixed level under control of the first control terminal; a second sensing sub-circuit, configured to transmit the voltage at the second node to a first sensing signal terminal under control of a second control terminal, so that the first sensing signal terminal senses a voltage associated with a threshold voltage of the driving sub-circuit.
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公开(公告)号：US10923041B2
公开(公告)日：2021-02-16
申请号：US16341626
申请日：2018-10-31
Inventor： Zhidong Yuan , Yongqian Li
IPC: G09G3/3291 , G09G3/00
Abstract: The present disclosure provides a detection method and a detection device for an array substrate driving circuit. In the detection method, in an all-on stage, a first supply voltage signal is input to a power terminal, a first data voltage signal is input to a data input terminal, a first sensing voltage signal is input to a sensing voltage terminal, a first gate-on signal is input to a first gate terminal, and a second gate-on signal is input to a second gate terminal. In a data voltage changing stage, the first data voltage signal is changed to a second data voltage signal. In a measurement stage, a voltage at a first electrode terminal of the light emitting device is measured, and the measured voltage is compared with a theoretical voltage to determine whether the array substrate driving circuit is normal.
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63.发明授权公开(公告)号：US10825413B2
公开(公告)日：2020-11-03
申请号：US16523215
申请日：2019-07-26
Inventor： Can Yuan , Yongqian Li , Zhidong Yuan
Abstract: A shift register circuit, a gate driving circuit and a method for driving the same, and a display apparatus are disclosed. The shift register circuit includes: an input circuit configured to receive an input signal and output the input signal to a pull-up node; an output circuit configured to receive a clock signal and provide an output signal at a signal output terminal based on the clock signal under control of a level at the pull-up node; a pull-down circuit configured to pull down a level at the signal output terminal under control of a level at a pull-down node; and at least one of a feedback circuit or a pull-down control circuit, wherein the feedback circuit is electrically coupled to the pull-up node, and is configured to output a first feedback signal based on the level at the pull-up node; and the pull-down control circuit is electrically coupled to the pull-up node and the pull-down node, and is configured to receive a second feedback signal and control the level at the pull-down node under control of the level at the pull-up node and the second feedback signal.
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公开(公告)号：US10679555B2
公开(公告)日：2020-06-09
申请号：US15757786
申请日：2015-08-14
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Longyan Wang , Yongqian Li
IPC: G09G3/30 , G09G3/3233 , G09G3/3258
Abstract: The present disclosure provides a compensating circuit. The compensating circuit includes a feedback module, and a driving transistor with a first gate, a second gate, a first electrode, and a second electrode. A first terminal of the feedback module is connected to a first voltage source and a second terminal of the feedback module is connected to the first electrode and the second gate of the driving transistor; and the first gate of the driving transistor is connected to a data line, and the second electrode of the driving transistor for outputting a driving current.
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公开(公告)号：US20200075113A1
公开(公告)日：2020-03-05
申请号：US16451150
申请日：2019-06-25
Inventor： Can Yuan , Yongqian Li , Zhidong Yuan
Abstract: A shift register unit, a drive method, a gate drive circuit and a display device are provided, in the field of display technologies. A first input signal terminal connected to an input control circuit of the shift register unit is connected to a first output terminal of a shift register unit at a previous stage, and a second input signal terminal connected to the input control circuit is connected to a second output terminal of the shift register unit at the previous stage. A signal output by the first output terminal of the shift register unit at the previous stage is a first clock signal and a signal output by the second output terminal is a second clock signal. Therefore, the first control node of the shift register unit may be controlled by flexibly adjusting a timing sequence of the first clock signal and the second clock signal.
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Patent Agency Ranking
公开(公告)号：US10559243B2
公开(公告)日：2020-02-11
申请号：US15579432
申请日：2017-06-02
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Yongqian Li , Pan Xu , Quanhu Li
Abstract: A pixel driving circuit and a driving method thereof, an array substrate and a display device are provided. The pixel driving circuit includes: a color data write unit, a luminance control unit, and a graphene light-emitting device. The graphene light-emitting device can emit light under the control of a color data signal and a luminance control signal. The driving method of a pixel driving circuit is conducted to drive the pixel driving circuit.
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公开(公告)号：US20200044092A1
公开(公告)日：2020-02-06
申请号：US16395444
申请日：2019-04-26
Inventor： Xuehuan Feng , Yongqian Li
IPC: H01L29/786 , H01L27/12 , H01L29/66 , G09G3/36
Abstract: An array substrate, a manufacturing method thereof and a display panel are provided. The array substrate includes a base substrate, a plurality of thin film transistors and a first light shielding layer. The base substrate includes a first surface and a second surface respectively located on opposite sides of the base substrate. The plurality of thin film transistors are disposed on the first surface of the base substrate, and each of the plurality of thin film transistors includes an active layer. The first light shielding layer is disposed on the second surface of the base substrate. The first light shielding layer has at least one opening that overlaps with at least one thin film transistor in a direction perpendicular to the second surface of the base substrate to allow light to irradiate at least the active layer of at least one thin film transistor.
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68.发明申请公开(公告)号：US20190304362A1
公开(公告)日：2019-10-03
申请号：US16116265
申请日：2018-08-29
Inventor： Zhidong Yuan , Yongqian Li , Pan Xu , Can Yuan
IPC: G09G3/3233 , G09G3/3266 , G09G3/3291 , H01L27/32
Abstract: A detection method for a pixel circuit, a driving method for a display panel and a display panel are disclosed. The pixel circuit includes a driving transistor including a gate electrode, and a first terminal connected to a sensing line. The detection method includes: applying a data voltage and a setting voltage to the driving transistor so as to obtain a sensed voltage and obtaining a threshold voltage of the driving transistor based on the data voltage, the setting voltage and the sensed voltage. The data voltage and the setting voltage are respectively applied to the gate electrode and the first terminal so as to set the driving transistor to be in a saturation region, the gate electrode is set to be in a suspension state when the driving transistor is maintained in the saturation region, and the sensed voltage is obtained after a pre-determined time period.
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公开(公告)号：US10276098B2
公开(公告)日：2019-04-30
申请号：US15116624
申请日：2015-10-30
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Cuili Gai , Kun Cao , Baoxia Zhang , Yongqian Li , Quanhu Li , Longyan Wang , Jingwen Yin
IPC: G09G3/3258 , G09G3/3233 , G09G3/3266 , G09G3/3291 , H01L27/12 , H01L27/32
Abstract: There are provided in the present disclosure a pixel driving circuit, an array substrate and a display apparatus. The pixel driving circuit comprises: a compensation module (11), a control module (12), a driving modeling (13), and a light emitting module (14), wherein: the compensation module (11) is connected to a scan signal (Scan), a data signal (Vdata) and a reference signal (VREF) and further connected to the control module (12) and the drive module (13), and is configured to receive the data signal (Vdata) and the reference signal (VREF) under the control of the scan signal (Scan) and compensate for a threshold voltage of the drive module (13) under the control of the control module (12); the control module (12) is connected to a light emitting control signal (EM) and a power supply signal (ELVDD) and further connected to the drive module (13) and the light emitting module (14), and is configured to receive the power supply signal (ELVDD) under the control of the light emitting control signal (EM) to control the compensation module (11) to compensate for the threshold voltage of the drive module (13); one terminal of the light emitting module (14) is connected to the drive module (13), and the other terminal thereof is grounded (VSS); and; the drive module (13) is configured to drive the light emitting module (14) to emit light under the control of the control module (12). The pixel driving circuit is capable of avoiding non-uniformity of luminance of the display device, and enhancing the display effect of the display device.
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公开(公告)号：US10168719B2
公开(公告)日：2019-01-01
申请号：US15852330
申请日：2017-12-22
Inventor： Xuehuan Feng , Pan Xu , Yongqian Li , Zhongyuan Wu
Abstract: The present invention provides a digital low dropout regulator and a control method thereof. The regulator comprises a voltage comparator, a counter, a decoder, a PMOSFET array and a divider. The voltage comparator receives an actual voltage output from the PMOSFET array through the positive input terminal, receives a reference voltage through the negative input terminal, and compares the actual voltage and the reference voltage to obtain a level signal. The divider calculates based on an output voltage pre-configured for a PMOSFET array and an actual voltage output by the PMOSFET array in at least two clock cycles to obtain a first value. The counter generates a control signal based on the level signal and the first value. The decoder receives the control signal transmitted by the counter and controlling the number of switched-on transistors, in the PMOSFET on a basis of the control signal.
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