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公开(公告)号：US20230269204A1
公开(公告)日：2023-08-24
申请号：US18141468
申请日：2023-05-01
发明人： Hyun Soo Cheon
CPC分类号： H04L49/90 , H04W48/08 , G06F16/2379 , H04L27/0014 , H04L2027/0095
摘要： Methods and apparatus for preamble detection in a communication network are disclosed. In an exemplary embodiment, a method includes retrieving parameters from a parameter database, filling a buffer of preamble data received in an uplink transmission from user equipment, and frequency shifting the buffer of preamble data based on one or more first parameters to generate frequency shifted data. The method also includes oversampling the frequency shifted data to generates oversampled data, downsampling the over sampled data based on one or more second parameters to generate preamble samples, and updating the parameter database with updated values for the one or more first and second parameters. The method also includes repeating all the operations until a selected amount of preamble samples is obtained.
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公开(公告)号：US11734363B2
公开(公告)日：2023-08-22
申请号：US17377236
申请日：2021-07-15
发明人： Christophe Therene , Nedeljko Varnica , Konstantin Kudryavtsev , Manish Shrivastava , Mats Oberg , Noam Mizrahi , Leo Jiang
IPC分类号： G06F16/907 , G06F16/901 , G06F16/9038 , G06F16/9035 , G06F16/783 , G06F16/387 , G06F16/683 , G06F16/383 , G06F3/06 , G06N3/08 , G06F12/1045 , G06F15/173 , H04L49/901 , H04L67/1097
CPC分类号： G06F16/907 , G06F3/0604 , G06F3/068 , G06F3/0638 , G06F3/0659 , G06F3/0688 , G06F12/1054 , G06F15/17331 , G06F16/383 , G06F16/387 , G06F16/683 , G06F16/783 , G06F16/901 , G06F16/9035 , G06F16/9038 , G06N3/08 , H04L49/901 , H04L67/1097 , G06F2212/254
摘要： Embodiments described herein provide improved methods and systems for generating metadata for media objects at a computational engine (such as an artificial intelligence engine) within the storage edge controller, and for storing and using such metadata, in data processing systems.
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公开(公告)号：US11728614B2
公开(公告)日：2023-08-15
申请号：US17895440
申请日：2022-08-25
IPC分类号： H04B10/00 , H01S5/00 , H01S5/02 , H01S5/323 , H04B10/27 , H04B10/07 , G01R31/26 , G02B6/12 , H01S5/0234 , H01S5/12
CPC分类号： H01S5/0042 , G01R31/2635 , G02B6/12004 , H01S5/021 , H01S5/0234 , H01S5/323 , H04B10/07 , H04B10/27 , H01S5/12
摘要： A photonics device includes a silicon wafer including a cathode region, an anode region, a trench region formed between the cathode region and the anode region, and a linear ridge formed between the cathode region and the anode region. A laser diode chip is mounted on the silicon wafer. A conductor layer disposed between the silicon wafer and the laser diode chip includes a first section disposed between the laser diode chip and the cathode region on a first side of the trench to electrically connect the laser diode chip to a cathode electrode of the photonics device and a second section disposed between the anode region and the laser diode chip on a second side of the trench to electrically connect the laser diode chip to an anode electrode of the photonics device.
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公开(公告)号：US11721363B2
公开(公告)日：2023-08-08
申请号：US17811990
申请日：2022-07-12
发明人： Supaket Katchmart
CPC分类号： G11B19/041 , G11B5/012 , G11B5/5526 , G11B5/59616 , G11B19/14 , G11B2220/2516
摘要： A method for writing repeatable run-out data, representing a recurring contribution to position error, to a rotating constant-density magnetic storage medium, includes repeating, for each respective track at a respective radius of the constant-density magnetic storage medium, (1) determining a respective track pattern frequency based on track location and desired data density, (2) locating a position in a respective servo wedge on the respective track based on servo sync mark detection, (3) writing the repeatable run-out data to the respective servo wedge at a time delay, from the location of the position in the respective servo wedge, that is inversely proportional to the respective radius, to achieve a predetermined offset, and (4) repeating the determining, the locating and the writing for each servo wedge on the respective track of the constant-density magnetic storage medium.
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公开(公告)号：US20230247636A1
公开(公告)日：2023-08-03
申请号：US18132922
申请日：2023-04-10
发明人： Yuanbin Guo
IPC分类号： H04W72/21 , H04L5/00 , H04W72/563
CPC分类号： H04W72/21 , H04L5/0055 , H04L5/0046 , H04L5/0057 , H04W72/563
摘要： Methods and apparatus for channel detection in an uplink shared control channel. In an exemplary embodiment, a method includes generating soft-combined bit streams for an acknowledgement (ACK) indicator, rank indicator (RI), and channel quality indicator (CQI) received in an uplink shared channel. The method also includes decoding the ACK, RI, and CQI soft-combined bit streams to generate Top-M decoded bit streams for each indicator, and generating Top-Q symbols for each indicator from the Top-M decoded bit streams for each indicator. The method also includes calculating metrics from the Top-Q symbols and uplink control information (UCI) symbols extracted from the uplink shared channel, combining the metrics to form a search space, and searching the search space to determine transmitted ACK, RI, and CQI bits.
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公开(公告)号：US11709674B2
公开(公告)日：2023-07-25
申请号：US17072378
申请日：2020-10-16
发明人： David Kravitz , Manan Salvi , David A. Carlson
CPC分类号： G06F9/30036 , G06F9/3012 , G06F9/30014 , G06F9/30112 , G06F9/3887
摘要： A method of implementing a processor architecture and corresponding system includes operands of a first size and a datapath of a second size. The second size is different from the first size. Given a first array of registers and a second array of registers, each register of the first and second arrays being of the second size, selecting a first register and corresponding second register from the first array and the second array, respectively, to perform operations of the first size. This allows a user, who is interfacing with the hardware processor through software, to provide data of the datapath bit-width instead of the register bit-width. Advantageously, the user is agnostic to the size of the registers.
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公开(公告)号：US20230229595A1
公开(公告)日：2023-07-20
申请号：US18123908
申请日：2023-03-20
发明人： Craig BARNER , David ASHER , Richard KESSLER , Bradley DOBBIE , Daniel DEVER , Thomas F. HUMMEL , Isam AKKAWI
IPC分类号： G06F12/084 , G06F12/0842 , G06F12/0813
CPC分类号： G06F12/084 , G06F12/0842 , G06F12/0813 , G06F2212/154
摘要： Systems and methods of multi-chip processing with low latency and congestion. In a multi-chip processing system, each chip includes a plurality of clusters arranged in a mesh design. A respective interconnect controller is disposed at the end of each column. The column is linked to a corresponding remote column in the other chip. A share cache controller in the column is paired with a corresponding cache controller in the remote column, the pair of cache controllers are configured to control data caching for a same set of main memory locations. Communications between cross-chip cache controllers are performed within linked columns of clusters via the column-specific inter-chip interconnect controllers.
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公开(公告)号：US20230229129A1
公开(公告)日：2023-07-20
申请号：US18123520
申请日：2023-03-20
申请人： Marvell Asia Pte Ltd
IPC分类号： G05B19/042 , G06N20/00 , G06F1/3206
CPC分类号： G05B19/042 , G06N20/00 , G06F1/3206 , G05B2219/2639
摘要： A system includes a power profile engine, a power measurement engine, and a power throttling signal generator. The power profile engine receives a desired power profile, e.g., a first profile current average associated with a first time duration and a second profile current average associated with a second time duration. The power measurement engine measures current being drawn and generates a first running average for the measured currents for the first time duration and generates a second running average for the measured currents for the second time duration. The power throttling signal generator generates a first power throttling signal to throttle power in response to the first running average for the measured currents being greater than the first profile current average and generates a second power throttling signal to throttle power in response to the second running average for the measured currents being greater than the second profile current average.
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公开(公告)号：US20230224832A1
公开(公告)日：2023-07-13
申请号：US18120224
申请日：2023-03-10
申请人： Marvell Asia Pte Ltd
发明人： Rui CAO , Hongyuan ZHANG , Liwen CHU , Yan ZHANG , Hui-Ling LOU
CPC分类号： H04W56/001 , H04W84/12
摘要： A communication device generates a first packet and a second packet. The first packet includes a first physical layer (PHY) preamble having: a first legacy signal field (L-SIG) having first duration information that indicates a first duration of the first packet; and first non-legacy signal field information having first modulation information that indicates a first modulation used in the first packet. The second packet includes a second PHY preamble having: a second L-SIG having second duration information that indicates a second duration of the second packet, wherein the second duration is different than the first duration; and second non-legacy signal field information having second modulation information that indicates a second modulation used in the second packet, wherein the second modulation is different than the first modulation. The communication device simultaneously transmits the first packet in a first frequency segment and the second packet in a second frequency segment.
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公开(公告)号：US11700202B2
公开(公告)日：2023-07-11
申请号：US17201798
申请日：2021-03-15
发明人： Ilan Yerushalmi , David Melman , Tal Mizrahi , Donald Pannell
IPC分类号： H04L45/745 , H04L12/18 , H04L45/586 , H04L47/2441 , H04L49/109 , H04L49/00 , H04L12/46 , H04L45/00 , H04L49/35
CPC分类号： H04L45/745 , H04L12/18 , H04L45/586 , H04L47/2441 , H04L49/109 , H04L49/70 , H04L12/4645 , H04L45/66 , H04L49/35
摘要： A switching system comprises a controlling switch and a plurality of port extenders. One of the port extenders includes: at least one upstream port; multiple downstream ports; and a forwarding engine. A forwarding database is populated with entries indicating associations between i) respective network addresses corresponding to devices coupled to downstream ports, and ii) respective local downstream ports. The forwarding database excludes entries corresponding to network addresses corresponding to devices coupled to the at least one upstream port. The forwarding engine is configured to: for a first packet received via one of the local downstream ports, and having a destination network address in the forwarding database, forward the first packet to a different local downstream port indicated by the forwarding database. For a second packet received via one of the local downstream ports, and having a destination network address not in the forwarding database, forward the second packet to the at least one upstream port.
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