Abstract:
A single crystal semiconductor structure includes: an amorphous substrate; a single crystal semiconductor layer provided on the amorphous substrate; and a thin orienting film provided between the amorphous substrate and the single crystal semiconductor layer, wherein the thin orienting film is a single crystal thin film, and the thin orienting film has a non-zero thickness that is equal to or less than 10 times a critical thickness hc.
Abstract:
A light emitting device may be a bar-type light emitting device and include a n-GaN semiconductor layer, a p-GaN semiconductor layer spaced apart from the n-GaN semiconductor layer, an active layer arranged between the n-GaN semiconductor layer and the p-GaN semiconductor layer, and a strain relaxing layer including indium clusters and voids.
Abstract:
A display apparatus includes a substrate, a light-emitting device provided on the substrate, a driving transistor device configured to control the light-emitting device, a first power supply line electrically connected to a source region of the driving transistor device, a conductive pattern electrically connected to a gate electrode of the driving transistor device, and a second power supply line electrically connected to the first power supply line, wherein the conductive pattern and the first power supply line constitute a first capacitor, and the conductive pattern and the second power supply line constitute a second capacitor, wherein the first capacitor and the second capacitor are connected in parallel.
Abstract:
Provided are a method of manufacturing a display apparatus and the display apparatus. The method includes forming an emissive layer and a driving layer on a first area of a substrate, forming an exposure line electrically connected to the driving layer, on a second area of the substrate, and forming a color conversion layer on the driving layer by emitting light from the emissive layer using the exposure line.
Abstract:
Provided are a micro light source array for a display device, a display device including the micro light source array, and a method of manufacturing the display device. The micro light source array includes: a plurality of silicon sub-mounts provided on a substrate, each silicon sub-mount from among the plurality of silicon sub-mounts corresponding to a respective sub-pixel from among a plurality of sub-pixels of a display device, the plurality of silicon sub-mounts being separated from each other by a plurality of trenches; a plurality of light emitting device chips coupled to the plurality of silicon sub-mounts; and a plurality of driving circuits provided at the plurality of silicon sub-mounts.
Abstract:
A single crystal semiconductor structure includes: an amorphous substrate; a single crystal semiconductor layer provided on the amorphous substrate; and a thin orienting film provided between the amorphous substrate and the single crystal semiconductor layer, wherein the thin orienting film is a single crystal thin film, and the thin orienting film has a non-zero thickness that is equal to or less than 10 times a critical thickness hc.
Abstract:
A display device is provided. The display device includes a substrate, an emission layer configured to emit light, the emission layer including a first semiconductor layer provided on the substrate, an active layer provided on the first semiconductor layer, and a second semiconductor layer provided on the active layer, and a plurality of color converting layers provided on the emission layer and configured to emit light of certain colors from light emitted from the emission layer.
Abstract:
Disclosed are GaN based light emitting devices and methods of manufacturing the same using post-mechanical treatment. The GaN based light emitting device includes first and second electrodes, and a flexible substrate which are sequentially stacked, an n-type GaN layer, an activation layer, and a p-type GaN layer interposed between the first and second electrodes and forming a core-shell structure, and a buried layer interposed between the flexible substrate and the first electrode, wherein the first electrode and the core-shell structure are buried in the buried layer.