公开(公告)号：US20200043437A1

公开(公告)日：2020-02-06

申请号：US16361168

申请日：2019-03-21

Applicant: Samsung Display Co., Ltd

Inventor： Ki Hyun PYUN ,  Eui Myeong Cho

IPC: G09G3/36 ,  G09G3/3258

Abstract: A display device includes: a driving voltage provider for generating a PWM signal according to the frequency of a clock signal, and providing a driving voltage generated according to the duty ratio of the PWM signal to at least one of the pixels, the data driver, and the scan driver. The driving voltage provider tunes the frequency of the clock signal to a first frequency in a first section, tunes the frequency of the clock signal to a second frequency smaller than the first frequency in a second section in which the magnitude of a driving voltage is larger than that in the first section, and tunes the frequency of the clock signal to a third frequency larger than the first frequency in a third section in which the magnitude of a driving voltage is smaller than that in the first section.

公开(公告)号：US20150091883A1

公开(公告)日：2015-04-02

申请号：US14161521

申请日：2014-01-22

Applicant: Samsung Display Co., Ltd.

Inventor： Ki Hyun PYUN ,  Yun Mi KIM ,  Min Young PARK ,  Sung-Jun KIM ,  Ju Hyun KIM ,  Yong Jae LEE ,  Kyung-Hwa LIM

IPC: G09G3/34

CPC classification number: G09G3/2074 ,  G09G3/3614 ,  G09G3/3677 ,  G09G2310/0289 ,  G09G2320/0252

Abstract: A method of reducing a time for switching a gate line driving signal of display device having plural gate lines from a level that is less than a full gate-on level to the gate-on level is disclosed. The method may include: during a gate line pre-charging period of a respective gate line, causing the gate line driving signal to be at the full gate-on level; during a corresponding gate line main-charging period that follows the pre-charging period, causing the gate line driving signal of to be at the full gate-on level; and during an interposed period that is interposed between the gate line pre-charging period and its corresponding gate line main-charging period, causing the gate line driving signal to be at an intermediate level that is between the full gate-on level and an opposed gate-off level.

Abstract translation: 公开了一种减少将具有多个栅极线的显示装置的栅极线驱动信号从小于全栅极导通电平的电平切换到栅极导通电平的方法。 该方法可以包括：在相应栅极线的栅极线预充电周期期间，使栅极线驱动信号处于完全栅极导通电平; 在预充电周期之后的相应的栅极线主充电期间，使栅极线驱动信号处于全栅极导通电平; 并且在插入在栅极线预充电周期与其对应的栅极线主充电周期之间的插入时段期间，使栅极线驱动信号处于处于完全栅极导通电平之间的中间电平， 关门水平

公开(公告)号：US20240169931A1

公开(公告)日：2024-05-23

申请号：US18431246

申请日：2024-02-02

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Ki Hyun PYUN ,  Hee Sook PARK

IPC: G09G3/3275 ,  G09G3/3233

CPC classification number: G09G3/3275 ,  G09G3/3233 ,  G09G2310/027

Abstract: A display device includes a display panel, a power supply a current measurer, a controller, and a sensor. The display panel includes pixels connected between first and second power lines. The power supply applies power voltages to the first and second power lines. The current measurer measures a current applied to the display panel from the power supply through the first and second power lines. The controller outputs a first sensing control signal indicating whether to sense a voltage-current characteristic of the light emitting element of at least one of the pixels based on a measured current. The sensor senses the voltage-current characteristic of the light emitting element in response to the first sensing control signal.

公开(公告)号：US20240153445A1

公开(公告)日：2024-05-09

申请号：US18415954

申请日：2024-01-18

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Ki Hyun PYUN ,  Jang Mi LEE

IPC: G09G3/32 ,  G09G3/3233

CPC classification number: G09G3/32 ,  G09G3/3233 ,  G09G2310/0275 ,  G09G2310/0278 ,  G09G2310/08 ,  G09G2330/021 ,  G09G2330/025 ,  G09G2330/04

Abstract: A display device includes a power supply generating a first power voltage, a second power voltage, and a third power voltage. The display device further includes a first power line to which the first power voltage is applied, a second power line to which the second power voltage is applied, and a readout line to which the third power voltage is applied. The display device further includes a display panel, which includes a pixel. The pixel includes a light emitting element connected between the first power line and the second power line, and a switching transistor connected between one electrode of the light emitting element and the readout line. The power supply changes a voltage level of the third power voltage based on a total current flowing from the power supply to the display panel according to the first and second power voltages.

公开(公告)号：US20240105105A1

公开(公告)日：2024-03-28

申请号：US18218241

申请日：2023-07-05

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Ki Hyun PYUN ,  Deok Ho Kang

IPC: G09G3/32

CPC classification number: G09G3/32 ,  G09G2310/0275 ,  G09G2310/08

Abstract: A display device including: pixels connected to data lines; a data driver configured to provide data voltages to the data lines; and a timing controller connected to the data driver through a clock training line and a clock data line, wherein the timing controller provides a clock training pattern to the clock data line when the timing controller provides a clock training signal having a first logic level to the clock training line, and provides a clock data signal to the clock data line when the timing controller provides the clock training signal having a second logic level to the clock training line, and wherein the timing controller provides a first configuration signal for a next clock training pattern when the clock training signal having the second logic level is provided to the clock training line.

公开(公告)号：US20230360589A1

公开(公告)日：2023-11-09

申请号：US18192004

申请日：2023-03-29

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jung Eon AN ,  Ki Hyun PYUN

IPC: G09G3/32

CPC classification number: G09G3/32 ,  G09G2310/08 ,  G09G2310/0275

Abstract: A display device includes: a first interface; a data driver providing first reference data to a first transmitter of the first interface; and a timing controller receiving second reference data through a first receiver of the first interface and comparing the first reference data with the second reference data to inspect signal transmission quality of the first interface for an error, wherein the first reference data is transmitted from the first transmitter to the first receiver via the first interface, wherein the timing controller changes a transmission state of the first interface when an error is detected in the signal transmission quality of the first interface, and wherein the transmission state of the first interface includes at least one of a transmission frequency, a driving current, or a termination resistance of the first interface.

公开(公告)号：US20230252955A1

公开(公告)日：2023-08-10

申请号：US18134431

申请日：2023-04-13

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Ki Hyun PYUN ,  Jang Mi LEE ,  Eun Jin CHOI

IPC: G09G5/10 ,  G09G3/20

CPC classification number: G09G5/10 ,  G09G3/20 ,  G09G2320/0271 ,  G09G2320/0646

Abstract: A display device includes: a pixel part partitioned into blocks; a scale factor provider which calculates a first load value of input image data for the pixel part, calculates a second load value of the input image data for each block, and generates a scale factor based on the first and second load values; and a timing controller which generates image data by scaling gray values of the input image data based on the scale factor. The scale factor provider generates a first scale factor for commonly controlling the gray values for the blocks based on the first load value, when the first load value is greater than or equal to a reference load value, and generates a second scale factor for controlling gray value for each block based on the first and second load values, when the first load value is less than the reference load value.

公开(公告)号：US20220277707A1

公开(公告)日：2022-09-01

申请号：US17745160

申请日：2022-05-16

Applicant: Samsung Display Co., Ltd.

Inventor： Eun Jin CHOI ,  Won Jin SEO ,  Ki Hyun PYUN

IPC: G09G5/10

Abstract: Provided herein may be a display device. The display device may include a display panel including a plurality of unit blocks disposed in a display area, the plurality of unit blocks including a first area displaying a logo or a banner, a second area having largest load value and a third area disposed between the first area and the second area, a display panel driver configured to generate data voltages based on input image data, and a zonal compensator configured to receive the input image data , to calculate load values of the input image data for the plurality of unit blocks, respectively, and to control luminance of each of the first area and the third area based on a location difference between the first area and the second area and a load value difference between the first area and the second area.

公开(公告)号：US20220254300A1

公开(公告)日：2022-08-11

申请号：US17645153

申请日：2021-12-20

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Ki Hyun PYUN ,  JANG MI LEE

IPC: G09G3/32

Abstract: A display device includes a power supply generating a first power voltage, a second power voltage, and a third power voltage. The display device further includes a first power line to which the first power voltage is applied, a second power line to which the second power voltage is applied, and a readout line to which the third power voltage is applied. The display device further includes a display panel, which includes a pixel. The pixel includes a light emitting element connected between the first power line and the second power line, and a switching transistor connected between one electrode of the light emitting element and the readout line. The power supply changes a voltage level of the third power voltage based on a total current flowing from the power supply to the display panel according to the first and second power voltages.

公开(公告)号：US20220215789A1

公开(公告)日：2022-07-07

申请号：US17700205

申请日：2022-03-21

Applicant: Samsung Display Co., Ltd.

Inventor： Su Min YANG ,  Wook LEE ,  Hye Ji KIM ,  Ki Hyun PYUN

IPC: G09G3/20 ,  G09G3/32

Abstract: A display device includes first pixels partitioned into a plurality of blocks, each of the plurality of blocks being categorized as a first block or a second block, a sensor configured to generate first sensing data for at least two of the first pixels in each of the plurality of blocks during a first period, and a sensing controller configured to generate interpolated data for the first pixels that are not sensed by the sensor by interpolating the first sensing data, for the first block, and configured to forgo interpolation of the first sensing data, for the second block. The sensor generates second sensing data for the first pixels that are not sensed by the sensor, for the second block, during a second period after the first period.