PIXEL CIRCUIT, PIXEL DRIVING METHOD AND DISPLAY DEVICE

    公开(公告)号:US20250014503A1

    公开(公告)日:2025-01-09

    申请号:US18275555

    申请日:2022-09-01

    Abstract: A pixel circuit, a pixel driving method and a display device are provided. The pixel circuit includes a driving circuit, a light emitting element and a light emitting gating control circuit; the driving circuit is electrically connected to a first electrode of the light emitting element, and is configured to drive the light emitting element; the light emitting gating control circuit is configured to form a current path between the second electrode of the light emitting element and the first voltage terminal under the control of the first control signal provided by the first control terminal according to the first light emitting control voltage provided by the first light emitting control voltage terminal and the light emitting data voltage provided by the light emitting data voltage terminal, to control the driving circuit to control the light emitting element to emit light.

    PIXEL CIRCUIT AND DRIVING METHOD THEREOF, DISPLAY PANEL AND DISPLAY APPARATUS

    公开(公告)号:US20240428738A1

    公开(公告)日:2024-12-26

    申请号:US18824517

    申请日:2024-09-04

    Abstract: A pixel circuit includes a driving circuit, a first control circuit and a second control circuit. The driving circuit is configured to receive a data signal in response to a scan signal, and generate, in response to a first enable signal, a driving signal according to a first voltage and the data signal. The first control circuit is configured to: receive a first input signal in response to a first control signal, and transmit a third input signal in response to the first input signal; and receive a second input signal in response to a second control signal, and transmit a second enable signal in response to the second input signal. The second control circuit is configured to transmit the driving signal to an element to be driven in response to one of the third input signal and the second enable signal.

    PIXEL CIRCUIT AND METHOD FOR DRIVING SAME, DISPLAY PANEL, AND DISPLAY DEVICE

    公开(公告)号:US20240257728A1

    公开(公告)日:2024-08-01

    申请号:US18629810

    申请日:2024-04-08

    CPC classification number: G09G3/32 G09G2300/0842 G09G2310/061

    Abstract: Provided is a pixel circuit. The pixel circuit includes a reset circuit, a data write circuit, a light-emission control circuit, and a drive circuit; wherein the reset circuit is configured to transmit a reset power signal supplied by the reset power terminal to the first node in response to a reset control signal; the data write circuit is configured to transmit a data signal supplied by the data signal terminal to the first node in response to a gate drive signal; the light-emission control circuit is configured to control conduction/non-conduction between the cathode of the light-emitting element and the second node, and control conduction/non-conduction between the third node and the pull-down power terminal, in response to a light-emission control signal; and the drive circuit is configured to control conduction/non-conduction between the second node and the third node in response to a potential of the first node.

    ARRAY SUBSTRATE, DISPLAY PANEL AND DISPLAY DEVICE

    公开(公告)号:US20240215362A1

    公开(公告)日:2024-06-27

    申请号:US18603918

    申请日:2024-03-13

    Abstract: An array substrate has a display area and a non-display area including a first bonding region and a fan-out region located between the display area and the first bonding region. The array substrate includes: a plurality of pixel columns disposed in the display area, at least two first power supply input terminals disposed in the first bonding region, and at least two first fan-out structures disposed in the fan-out region. Each pixel column includes light-emitting units. Each first power supply input terminal is connected to multiple pixel columns of the plurality of pixel columns through one first fan-out structure, so as to provide a first power supply signal to the multiple pixel columns. Each first fan-out structure includes a plurality of first conductive units, and each first conductive unit is electrically connected to at least one of the plurality of pixel columns.

    ARRAY SUBSTRATE, DISPLAY PANEL AND DISPLAY DEVICE

    公开(公告)号:US20230178016A1

    公开(公告)日:2023-06-08

    申请号:US17615514

    申请日:2021-01-15

    CPC classification number: G09G3/3233 H10K59/131 G09G2300/0426 G09G2320/0233

    Abstract: An array substrate has a display area and a non-display area including a first bonding region. The array substrate includes: a plurality of pixel columns disposed in the display area, each of the plurality of pixel columns including a plurality of light-emitting units that are arranged in a second direction, the second direction being perpendicular to a direction in which an edge of the display area proximate to the first bonding region extends; and at least three first power supply input terminals disposed in the first bonding region, each first power supply input terminal being connected to at least one pixel column of the plurality of pixel columns, so as to provide a first power supply signal to the at least one pixel column.

    SHIFT REGISTER AND DRIVING METHOD THEREOF, GATE DRIVER AND DISPLAY DEVICE

    公开(公告)号:US20220406244A1

    公开(公告)日:2022-12-22

    申请号:US17620206

    申请日:2020-12-23

    Abstract: A shift register includes: an input circuit for transmitting an input signal to a first node under control of a first clock signal, and for transmitting the first clock signal to the second node under control of a level of the first node; a control circuit for transmitting a second power supply signal to the first node under control of a level of the second node and a second clock signal, for transmitting the second clock signal to the third node under control of a level of the fourth node and/or the first; a pull-down control circuit; and an output circuit for transmitting the fourth power supply signal or the third power supply signal to the signal output terminal. The pull-down control circuit controls a level of the fifth node regardless of the first clock signal.

    PIXEL DRIVING CIRCUIT AND DISPLAY PANEL

    公开(公告)号:US20220319417A1

    公开(公告)日:2022-10-06

    申请号:US17309917

    申请日:2020-09-28

    Abstract: The present disclosure provides a pixel driving circuit and a display panel. The pixel driving circuit includes: a data writing sub-circuit configured to transmit a data voltage signal to a first terminal of a driving sub-circuit in response to a first scanning signal; a threshold compensation sub-circuit configured to compensate for a threshold voltage of the driving sub-circuit in response to a second scanning signal; a storage sub-circuit configured to store the data voltage signal; the driving sub-circuit configured to provide a driving current for a light emitting device to be driven according to voltages of a first terminal and a control terminal of the driving sub-circuit; and a voltage maintaining sub-circuit configured to maintain the voltage of the control terminal of the driving sub-circuit when the voltage of the first terminal of the driving sub-circuit jumps.

    DISPLAY APPARATUSES, PIXEL CIRCUITS AND METHODS OF DRIVING PIXEL CIRCUIT

    公开(公告)号:US20220215793A1

    公开(公告)日:2022-07-07

    申请号:US17509899

    申请日:2021-10-25

    Abstract: The present disclosure provides a display apparatus, a pixel circuit and a method of driving a pixel circuit. In one or more embodiments, the pixel circuit includes a driving transistor, a data signal module and a bias signal module. A first electrode of the driving transistor is connected with a first power signal terminal, a second electrode of the driving transistor is connected with a first terminal of a light emitting element, and the driving transistor includes a first control electrode and a second control electrode. The data signal module is connected with the driving transistor, a data writing signal terminal and a data signal terminal. The bias signal module is connected with the driving transistor, a bias writing signal terminal and a bias signal terminal, and is configured to adjust a threshold voltage of the driving transistor under control of the bias writing signal terminal and the bias signal terminal.

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