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公开(公告)号：US20250020798A1
公开(公告)日：2025-01-16
申请号：US18774042
申请日：2024-07-16
Applicant: Advanced Micro Devices, Inc.
Inventor： Ngoc Vinh Vu , Neil Patrick Kelly
Abstract: Systems, apparatuses, and methods for implementing a dual-purpose millimeter-wave frequency band transmitter are disclosed. A system includes a dual-purpose transmitter sending a video stream over a wireless link to a receiver. In some embodiments, the video stream is generated as part of an augmented reality (AR) or virtual reality (VR) application. The transmitter operates in a first mode to scan and map an environment of the transmitter and receiver. The transmitter generates radio frequency (RF) signals in a first frequency range while operating in the first mode. Additionally, the transmitter operates in a second mode to send video data to the receiver, and the transmitter generates RF signals in the first frequency range while operating in the second mode.
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公开(公告)号：US12190225B2
公开(公告)日：2025-01-07
申请号：US16779557
申请日：2020-01-31
Applicant: Advanced Micro Devices, Inc.
Inventor： Chao Liu , Daniel Isamu Lowell , Wen Heng Chung , Jing Zhang
Abstract: A technique for manipulating a generic tensor is provided. The technique includes receiving a first request to perform a first operation on a generic tensor descriptor associated with the generic tensor, responsive to the first request, performing the first operation on the generic tensor descriptor, receiving a second request to perform a second operation on generic tensor raw data associated with the generic tensor, and responsive to the second request, performing the second operation on the generic tensor raw data.
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公开(公告)号：US20250008698A1
公开(公告)日：2025-01-02
申请号：US18345917
申请日：2023-06-30
Applicant: Advanced Micro Devices, Inc.
Inventor： Girish Anant Kini , Ahmed Mohamed Abou-Alfotouh , Shardul Suresh Adkar , Ethan Cruz , Salvador D. Jimenez, III , Mark Steinke , Edgar Stone
IPC: H05K7/20
Abstract: A method for server level cooling can include providing a printed circuit board and attaching a cooling system to the printed circuit board. The cooling system can be configured for placement thereon of two or more expansion cards having back side power delivery components. Various other methods, systems, and computer-readable media are also disclosed.
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公开(公告)号：US20250007516A1
公开(公告)日：2025-01-02
申请号：US18763572
申请日：2024-07-03
Applicant: Advanced Micro Devices, Inc.
Inventor： Rajesh Kumar , Edoardo Prete , Gerald R. Talbot , Ethan Crain , Tracy J. Feist , Jeffrey Cooper
IPC: H03K19/0175 , H03F3/45
Abstract: Systems, apparatuses, and methods for implementing a combo scheme for direct current (DC) level shifting of signals are disclosed. A receiver circuit receives an input signal on a first interface. The first interface is coupled to a resistor in parallel with a capacitor which passes the input signal to a second interface. Also, the first interface is coupled to a first pair of current sources between ground and a voltage source, and the second interface is coupled to a second pair of current sources between ground and the voltage source. An op-amp drives the current sources based on a difference between a sensed common mode voltage and a reference voltage. Based on this circuit configuration, the receiver circuit is able to prevent baseline wander, perform a DC level shift of the input signal, and achieve linear equalization of the input signal.
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公开(公告)号：US20250005841A1
公开(公告)日：2025-01-02
申请号：US18345460
申请日：2023-06-30
Applicant: Advanced Micro Devices, Inc. , ATI Technologies ULC
Inventor： Michal Adam Wozniak , Guennadi Riguer
Abstract: A technique for sampling a primitive ID map. The technique includes identifying a sample point having a location in a texture space; obtaining a primitive ID sample from the primitive ID map based on the location of the sample point in the texture space; identifying a primitive based on the primitive ID; testing the location in the texture space for inclusion within the identified primitive; and selecting either the primitive ID or a different primitive ID based on the testing.
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Patent Agency Ranking
公开(公告)号：US20250005840A1
公开(公告)日：2025-01-02
申请号：US18345427
申请日：2023-06-30
Applicant: Advanced Micro Devices, Inc. , ATI Technologies ULC
Inventor： Guennadi Riguer , Michal Adam Wozniak
Abstract: A technique for texture filtering. A transition is made from a first mipmap corresponding to a first texture resolution to a second mipmap corresponding to a second texture resolution. The first texture resolution is lower than the second texture resolution. As compared to standard trilinear filtering, initiation of the transition is delayed by an offset (or bias), which serves to delay the initial use of the second mipmap until it has been loaded. Following initiation of the transition, first and second weightings are selected with a nonlinear filter, and the system interpolates between the first mipmap and the second mipmap by applying the weightings. During an initial portion of the transition, the nonlinear filter has a slope that is higher than that of the standard trilinear filter.
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57.发明申请公开(公告)号：US20250004974A1
公开(公告)日：2025-01-02
申请号：US18345992
申请日：2023-06-30
Applicant: ADVANCED MICRO DEVICES, INC. , ATI TECHNOLOGIES ULC
Inventor： BUHENG XU , XIAO HAN , PHILIP NG , SHIWU YANG
IPC: G06F13/42
Abstract: An apparatus translates transaction requests using a bus protocol translation lookup table (LUT) that comprises bus protocol translation data. A bus protocol translation controller generates the outgoing translated transaction request by translating the incoming transaction request using the bus protocol translation data from the bus protocol translation LUT. The controller translates a received response from the target unit to a response in a first bus protocol for a corresponding requesting unit. Associated methods are also presented. In some examples, the bus protocol translation data corresponds to each of a plurality of requesting units for translating between an incoming transaction request sent via a first bus protocol to an outgoing translated transaction request sent via a second bus protocol for the at least one target unit.
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公开(公告)号：US20250004963A1
公开(公告)日：2025-01-02
申请号：US18217079
申请日：2023-06-30
Applicant: Advanced Micro Devices, Inc.
Inventor： William Peter Ehrett , Anthony Gutierrez , Vedula Venkata Srikant Bharadwaj , Karthik Ramu Sangaiah , Prachi Shukla , Sriseshan Srikanth , Ganesh Dasika , John Kalamatianos
IPC: G06F13/36
Abstract: A semiconductor device, referred to herein as a Globally Interconnected Operations (GIO) layer, provides global operations in the form of global data reduction for one or more PE arrays. The GIO layer includes processing elements that perform global data reduction on processing results from one or more PE arrays. The GIO layer includes connectors that allow it to be arranged in a 3D stack with one or more PE arrays, for example, on top of or beneath a PE array. This allows reduction operations to be implemented across PE arrays using an efficient topology with superior flexibility, scalability, latency and/or power characteristics that is customizable for particular use cases at assembly time, without requiring costly and time-consuming redesign of PE arrays, and without being constrained by particular PE array designs.
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公开(公告)号：US20250004955A1
公开(公告)日：2025-01-02
申请号：US18215519
申请日：2023-06-28
Applicant: Advanced Micro Devices, Inc.
Inventor： Anthony Thomas Gutierrez , Todd David Basso , Gabriel Hsiuwei Loh
IPC: G06F13/16 , G06F13/366
Abstract: Programmable I/O die devices and methods are described. An example system includes an input/output die (IOD) that couples a plurality of devices. The system also includes a programmable fabric included in the IOD. The programmable fabric implements interconnects for connecting the plurality of devices according to a reconfigurable topology defined by a configuration of the programmable fabric.
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公开(公告)号：US20250004806A1
公开(公告)日：2025-01-02
申请号：US18216310
申请日：2023-06-29
Applicant: ADVANCED MICRO DEVICES, INC.
Inventor： Mark Unruh Wyse , Anthony Thomas Gutierrez , Stephen Alexander Zekany , Paul Blinzer
IPC: G06F9/455
Abstract: A processing unit (e.g., a CPU) executes multiple processes, such as multiple virtual machines, wherein each process employs virtual signals and virtual signal monitors to support signaling between the process and one or more accelerators. A hardware signal manager (HSM) assigns each virtual signal to a physical signal of the system and assigns each virtual signal monitor to a physical signal monitor. Based on a process' interactions (e.g., signal operations) with a virtual signal monitor, the HSM executes corresponding interactions at the assigned physical signal monitor. The HSM thus virtualizes the physical signal monitors for the executing processes.
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