Systems, methods, and devices for fault resilient storage

    公开(公告)号:US12259786B2

    公开(公告)日:2025-03-25

    申请号:US17232144

    申请日:2021-04-15

    Abstract: A method of operating a storage device may include determining a fault condition of the storage device, selecting a fault resilient mode based on the fault condition of the storage device, and operating the storage device in the selected fault resilient mode. The selected fault resilient mode may include one of a power cycle mode, a reformat mode, a reduced capacity read-only mode, a reduced capacity mode, a reduced performance mode, a read-only mode, a partial read-only mode, a temporary read-only mode, a temporary partial read-only mode, or a vulnerable mode. The storage device may be configured to perform a namespace capacity management command received from the host. The namespace capacity management command may include a resize subcommand and/or a zero-size namespace subcommand. The storage device may report the selected fault resilient mode to a host.

    Systems, methods, and devices for data recovery using parity space as recovery space

    公开(公告)号:US12259785B2

    公开(公告)日:2025-03-25

    申请号:US17227262

    申请日:2021-04-09

    Abstract: A method may include operating a first storage device and a second storage device as a redundant array configured to use parity information to recover information from a faulty storage device, operating the first storage device in a fault resilient mode with at least partial read capability based on a fault condition of the first storage device, and rebuilding information from the first storage device in a parity space of the second storage device. Rebuilding the information from the first storage device in the parity space of the second storage device may include copying the information from the first storage device to the parity space of the second storage device. The method may further include copying the rebuilt information from the parity space of the second storage device to a replacement storage device.

    Electronic device for expanding sensing bandwidth by integrating plurality of channel impulse responses, and control method therefor

    公开(公告)号:US12259457B2

    公开(公告)日:2025-03-25

    申请号:US17957661

    申请日:2022-09-30

    Abstract: An electronic device is provided. The electronic device includes a first communication circuit, a second communication circuit, and at least one processor. The first communication circuit is configured to receive, in a first band, a first reflective signal reflected by an object, and obtain, based on the received first reflective signal, a first channel impulse response corresponding to the first reflective signal. The second communication circuit is configured to receive, in a second band, a second reflective signal reflected by the object, obtain, based on the received second reflective signal, a second channel impulse response corresponding to the second reflective signal, and obtain a third channel impulse response based on a first calculation using the second channel impulse response, a first central frequency of the first band and a second central frequency of the second band.

    Robot and controlling method thereof

    公开(公告)号:US12257715B2

    公开(公告)日:2025-03-25

    申请号:US17974941

    申请日:2022-10-27

    Abstract: A robot is provided. The robot includes a sensor, a driver, a communication interface, and a processor configured to acquire first context data through the sensor, receive second context data acquired by at least one other robot through the communication interface, identify at least one context data of the first context data and the second context data based on a collaboration scenario of the robot and the other robot, input the identified at least one context data to a predetermined task allocation algorithm related to the collaboration scenario to acquire task information corresponding to the robot, and control the driver based on the acquired task information.

    Device and method of delivering item along route

    公开(公告)号:US12256851B2

    公开(公告)日:2025-03-25

    申请号:US17940821

    申请日:2022-09-08

    Abstract: Provided is an electronic device configured to generate a route including a point of departure and a first destination determined based on order information, while the electronic device is moved along the route using a driver, in response to not receiving an order from the first destination on which seating information indicating at least one seated customer is identified, perform an operation of outputting information indicating a serving tray accommodating a basic item based on the electronic device reaching the first destination, and based on a drive along the route being completed, in response to not delivering, to the first destination, at least one item indicated in an order received from the first destination, exclude the first destination from the route.

    CHIP PACKAGE STRUCTURE AND METHOD OF MANUFACTURING THE SAME

    公开(公告)号:US20250098355A1

    公开(公告)日:2025-03-20

    申请号:US18444062

    申请日:2024-02-16

    Inventor: Weizhong ZHOU

    Abstract: A chip package structure and a method of manufacturing the same are provided. The chip package structure includes a substrate; a chip spaced from the substrate and having a first surface, a second surface and a side surface, the first surface of the chip including a photosensitive area and a non-photosensitive area surrounding the photosensitive area; a molding layer having a first surface and a second surface, the molding layer provided on the non-photosensitive area of the chip and the side surface of the chip.

    SEMICONDUCTOR DEVICE
    518.
    发明申请

    公开(公告)号:US20250098278A1

    公开(公告)日:2025-03-20

    申请号:US18815956

    申请日:2024-08-27

    Abstract: A semiconductor device includes a substrate, lower channel layers spaced apart from each other in a vertical direction perpendicular to an upper surface of the substrate and extending in the first direction, upper channel layers on the lower channel layers, respectively, and spaced apart from each other in the vertical direction, a middle dielectric isolation structure between an uppermost lower channel layer among the lower channel layers and a lowermost upper channel layer among the upper channel layers, a lower gate structure on the lower channel layers; an upper gate structure on the upper channel layers on the lower gate structure and extending in a second direction perpendicular to the first direction. a gate isolation insulating layer between the lower gate structure and the upper gate structure, in contact with a side surface of the middle dielectric isolation structure, and extending around the lower gate structure.

    MAGNETIC MEMORY DEVICE
    520.
    发明申请

    公开(公告)号:US20250098176A1

    公开(公告)日:2025-03-20

    申请号:US18608130

    申请日:2024-03-18

    Inventor: KILHO LEE

    Abstract: A magnetic memory device may include conductive lines provided in cell region and peripheral region, a first insulating layer provided in the cell region and the peripheral region, and surrounding the conductive lines, a second insulating layer provided on the first insulating layer in the cell region and the peripheral region, and on top surfaces of the conductive lines, and data storage patterns provided on the second insulating layer in the cell region and electrically connected to corresponding conductive lines of the conductive lines. The second insulating layer in the peripheral region may include first portions on the top surfaces of the conductive lines, and second portions disposed between the first portions. Top surfaces of the first portions may be disposed at a level higher than top surfaces of the second portions.

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