公开(公告)号：US20240130194A1

公开(公告)日：2024-04-18

申请号：US18226369

申请日：2023-07-26

Applicant: Samsung Display Co., Ltd.

Inventor： HEERIM SONG ,  MUKYUNG JEON ,  CHEOL-GON LEE

IPC: H10K59/65 ,  G06V40/13 ,  H10K59/121 ,  H10K59/131

CPC classification number: H10K59/65 ,  G06V40/1306 ,  H10K59/1213 ,  H10K59/131

Abstract: A display device including: a base layer; a circuit layer disposed on the base layer; and an element layer disposed on the circuit layer, the element layer including a light emitting element and a light receiving element, wherein the circuit layer includes: a pixel drive circuit connected to the light emitting element; a sensor drive circuit connected to the light receiving element; a data wire connected to the pixel drive circuit; a readout wire connected to the sensor drive circuit; and a shielding electrode wire overlapping the readout wire on a plane.

公开(公告)号：US20240112632A1

公开(公告)日：2024-04-04

申请号：US18450786

申请日：2023-08-16

Applicant: Samsung Display Co., Ltd.

Inventor： HEERIM SONG ,  CHEOL-GON LEE ,  MUKYUNG JEON

IPC: G09G3/3233 ,  G06F3/041 ,  G06F3/042 ,  G06V40/13

CPC classification number: G09G3/3233 ,  G06F3/0412 ,  G06F3/04166 ,  G06F3/042 ,  G06V40/1318 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2310/08 ,  G09G2354/00

Abstract: A display device includes a plurality of pixels, each of which includes a light emitting element and a pixel driving circuit and a plurality of sensors, each of which includes a light receiving element and a sensor driving circuit. A sensor driving circuit included in at least one of sensors includes a reset transistor configured to output a reset signal to a first sensing node in response to a reset control signal, an amplification transistor connected to first and second sensing nodes and configured to receive a sensor driving voltage, a first output transistor connected between the second sensing node and a readout line and configured to receive a first output control signal, and a second output transistor connected between the second sensing node and the readout line and configured to receive a second output control signal.

公开(公告)号：US20240021165A1

公开(公告)日：2024-01-18

申请号：US18204395

申请日：2023-06-01

Applicant: Samsung Display Co., Ltd.

Inventor： JANGMI KANG ,  HYEONGSEOK KIM ,  JUNHYUN PARK ,  MINJAE JEONG ,  MUKYUNG JEON

IPC: G09G3/3266

CPC classification number: G09G3/3266 ,  G09G2320/0247

Abstract: Provided is a scan driver for applying a bias voltage comprising a kth stage that includes an inputter transmitting an input signal to a first node, a stress reliever disposed between the first node and a second node, a carry signal outputter receiving a high-power-supply voltage and a second clock signal and outputting the second clock signal, an output signal outputter receiving the high-power-supply voltage and a third clock signal and outputting the third clock signal, a maintainer transmitting the first clock signal to a third node, and a stabilizer applying a first low-power-supply voltage to the third node and the high-power-supply voltage to the first node. The first and second clock signals selectively toggle between the high-power-supply voltage and the first low-power-supply voltage, the third clock signal selectively toggles between the high-power-supply voltage and a second low-power-supply voltage, and the bias voltage is adjusted as the second low-power-supply voltage varies.

公开(公告)号：US20230360590A1

公开(公告)日：2023-11-09

申请号：US18224079

申请日：2023-07-20

Applicant: Samsung Display Co., Ltd.

Inventor： MINJAE JEONG ,  JANGMI KANG ,  HYEONGSEOK KIM ,  JUNHYUN PARK ,  MUKYUNG JEON

IPC: G09G3/32

CPC classification number: G09G3/32 ,  G09G2300/0842 ,  G09G2310/0275 ,  G09G2310/0267 ,  G09G2310/061

Abstract: A pixel of a display device includes a first transistor including a top gate coupled to a first node, a first terminal, a second terminal coupled to a second node, and a bottom gate, a second transistor including a gate coupled to a writing signal line, a first terminal coupled to a data line, and a second terminal coupled to the first node, a storage capacitor coupled between the first node and the second node, a light emitting element coupled between the second node and a second power supply voltage line, and a seventh transistor including a gate coupled to an initialization signal line, a first terminal coupled to a bias voltage line, and a second terminal coupled to the bottom gate.

公开(公告)号：US20230345767A1

公开(公告)日：2023-10-26

申请号：US18170511

申请日：2023-02-16

Applicant: Samsung Display Co., Ltd.

Inventor： HEERIM SONG ,  MUKYUNG JEON ,  HEEJEAN PARK

IPC: H10K59/122 ,  H10K59/12 ,  H10K39/34 ,  H10K59/35

CPC classification number: H10K59/122 ,  H10K59/1201 ,  H10K39/34 ,  H10K59/35 ,  H10K59/771

Abstract: A display device includes: a base layer; a circuit layer on the base layer; and an element layer on the circuit layer and comprising a plurality of light emitting elements and a plurality of light receiving elements, the element layer including: a pixel definition layer having a light emitting opening defined therethrough to correspond to the light emitting elements and a light receiving opening defined therethrough to correspond to the light receiving elements; a disconnected spacer layer adjacent to the light receiving opening on the pixel definition layer; and a common layer commonly in the light emitting elements and the light receiving elements and partially disconnected around the light receiving elements due to the disconnected spacer layer.

公开(公告)号：US20220366849A1

公开(公告)日：2022-11-17

申请号：US17702136

申请日：2022-03-23

Applicant: Samsung Display Co., Ltd.

Inventor： YUJIN LEE ,  HEEJEAN PARK ,  HEERIM SONG ,  CHEOL-GON LEE ,  MUKYUNG JEON

IPC: G09G3/3233 ,  H01L27/32

Abstract: A pixel includes a driving transistor, a switching transistor, and first and second capacitors. The gate of the driving transistor is disposed below a first insulating layer, and a first conductive pattern defining a first electrode of the first capacitor is disposed below the first insulating layer. A second conductive pattern defining a second electrode of the first capacitor and a first electrode of the second capacitor is disposed on the first insulating layer, a third conductive pattern defining a second electrode of the second capacitor is disposed on a second insulating layer covering the second conductive pattern, and the data line is disposed above the second insulating layer.