Scan circuit and display apparatus
    42.
    发明授权

    公开(公告)号:US12148358B2

    公开(公告)日:2024-11-19

    申请号:US17760495

    申请日:2021-11-01

    Abstract: A scan circuit is provided. The scan circuit includes a plurality of stages. A respective stage of the scan circuit includes a second processing subcircuit, which includes a first capacitor, a sixth transistor, and a seventh transistor. The respective stage of the scan circuit further includes a sixth connecting line connecting a first electrode of the seventh transistor, a second electrode of the sixth transistor, and a second capacitor electrode of the first capacitor together. The sixth connecting line crosses over both the first capacitor electrode and the second capacitor electrode of the first capacitor.

    Pixel circuit, driving method for same, and display apparatus

    公开(公告)号:US12067943B2

    公开(公告)日:2024-08-20

    申请号:US18471324

    申请日:2023-09-21

    Abstract: A pixel circuit, a driving method for same, and a display apparatus are provided. The pixel circuit includes a driving sub-circuit, a writing sub-circuit, a compensation sub-circuit, a first reset sub-circuit, an emitting element. The driving sub-circuit provides a driving current for a third node under control of signals of first and second nodes. The writing sub-circuit writes a signal of the data signal terminal into the second node under control of a signal of a second scanning signal terminal. The first reset sub-circuit writes an initial voltage signal of a first initial signal terminal into the third node under control of a first scanning signal terminal and a first emitting control signal terminal. The compensation sub-circuit writes the initial voltage signal of the third node into the first node under control of a third scanning signal terminal, compensates the first node under control of the third scanning signal terminal.

    Array substrate, display panel, and display device

    公开(公告)号:US12022698B2

    公开(公告)日:2024-06-25

    申请号:US17298222

    申请日:2020-09-22

    CPC classification number: H10K59/126

    Abstract: The present disclosure provides an array substrate, a display panel and a display device. The array substrate includes: a base substrate; a low temperature poly-silicon thin film transistor located on the base substrate and including a poly-silicon active layer and a first gate which are laminated on the base substrate; an oxide thin film transistor located on the base substrate and including an oxide active layer and a second gate which are laminated on the base substrate; and a light shielding layer, where an overlapping area of a projection of the light shielding layer on the base substrate and an orthographic projection of the oxide active layer on the base substrate is S1, an overlapping area of the projection of the light shielding layer on the base substrate and an orthographic projection of the poly-silicon active layer on the base substrate is S2, and S1 is greater than S2.

Patent Agency Ranking