公开(公告)号：US3648069A

公开(公告)日：1972-03-07

申请号：US3648069D

申请日：1970-10-13

申请人： MOTOROLA INC

发明人： FREDERIKSEN THOMAS M

IPC分类号： H03K3/2897 ,  H03K5/20

CPC分类号： H03K3/2897

摘要： An integrated, differential, symmetrical-hysteresis trigger circuit includes an input differential amplifier using lateral PNP-transistors, driving an output differential switch using cascaded NPN-transistors. A first current source supplies operating current to the input differential amplifier and a second current source provides operating current for the emitters of the transistors in the output differential amplifier. The collector of one of the output differential amplifier transistors is connected to a third current source, providing current which is less than that provided by the first and second current sources; and a feedback circuit provides snap-action switching of the output differential amplifier. The hysteresis of operation of the circuit is controlled by the magnitude of the emitter resistors in the input differential stage.

摘要翻译： 集成的差分对称滞后触发电路包括使用横向PNP晶体管的输入差分放大器，驱动使用级联NPN晶体管的输出差分开关。 第一电流源向输入差分放大器提供工作电流，第二电流源为输出差分放大器中的晶体管的发射极提供工作电流。 输出差分放大器晶体管之一的集电极连接到第三电流源，提供的电流小于由第一和第二电流源提供的电流; 并且反馈电路提供输出差分放大器的快动切换。 电路的工作滞后由输入差分级的发射极电阻的大小控制。

公开(公告)号：US3573495A

公开(公告)日：1971-04-06

申请号：US3573495D

申请日：1968-08-26

申请人： IBM

发明人： XYLANDER MELVIN P

IPC分类号： G11C7/00 ,  H03K3/2897 ,  H03K5/01 ,  H03K17/14 ,  H03K17/30 ,  H03K5/20

CPC分类号： H03K17/14 ,  H03K3/2897 ,  H03K5/01 ,  H03K17/30

摘要： The gain of a difference amplifier is controlled as a function of temperature to offset variations, which are due to temperature changes, in the threshold level of a threshold device.

公开(公告)号：US3553491A

公开(公告)日：1971-01-05

申请号：US3553491D

申请日：1969-01-10

申请人： IBM

发明人： SCHULZ RAYMOND A

IPC分类号： G11C7/00 ,  G11B20/14 ,  H03K3/2897 ,  H03K5/156 ,  H04L25/49 ,  H03K5/20

CPC分类号： G11B20/1419 ,  H03K3/2897 ,  H03K5/156 ,  H04L25/49

摘要： A high-speed memory device sensing circuit comprises a difference amplifier having outputs connected to threshold circuit means which detects positive going voltage signals. Outputs from the threshold circuits are connected to set a pair of latches when positive going signals are detected by the threshold circuits. Means for detecting the order in which the latches are set comprises a NAND gate and a third latch connected to the output thereof which is set to produce an output signal when a binary one is read out of memory and which remains in the reset condition when a binary zero signal is read out of memory.

公开(公告)号：US5945852A

公开(公告)日：1999-08-31

申请号：US52467

申请日：1998-03-31

申请人： Jeannie Han Kosiec

发明人： Jeannie Han Kosiec

IPC分类号： H03K3/2897 ,  H03K3/037

CPC分类号： H03K3/2897

摘要： A comparator circuit (100) produces a binary output voltage at an output (109) in response to a time varying input signal received at an input (108). The comparator circuit includes an output circuit (106) having a first current mirror (202), a second current mirror (204), a bias circuit (206) and a helping current source (208). Bias currents are applied in response to the state of the output voltage at the output to increase the gain and the hysteresis of the output circuit.

摘要翻译： 比较器电路（100）响应于在输入端（108）接收的时变输入信号，在输出（109）产生二进制输出电压。 比较器电路包括具有第一电流镜（202），第二电流镜（204），偏置电路（206）和辅助电流源（208）的输出电路（106）。 响应于输出端的输出电压的状态而施加偏置电流以增加输出电路的增益和滞后。

公开(公告)号：US5757210A

公开(公告)日：1998-05-26

申请号：US699493

申请日：1996-08-19

申请人： Christopher J. Sanzo

发明人： Christopher J. Sanzo

IPC分类号： H03K3/0233 ,  H03K3/2897

CPC分类号： H03K3/0233

摘要： A latchable comparator including a comparator and a circuit having a reset input. When the comparator produces a first state, it is latched when the reset input is in the non-reset state. In this state, the comparator receives a comparison signal having a high or low value and a latch signal being outside the range of voltages extending between the low and high values. A reset signal causes the latch signal to be replaced by a comparator reference signal. Further disclosed is a latchable comparator including a comparator and a flip-flop. The comparator has a ramp input, a control input, a first reference input and a second reference input. The flip-flop provides latch signals to each of the first and second reference inputs when its reset input is in the non-reset state and said comparator is generating a first state and maintains the latch signals until a reset signal is received.

摘要翻译： 一种可锁定比较器，包括比较器和具有复位输入的电路。 当比较器产生第一状态时，当复位输入处于非复位状态时，它被锁存。 在该状态下，比较器接收具有高或低值的比较信号，并且锁存信号位于在低值和高值之间延伸的电压范围之外。 复位信号使锁存信号由比较器参考信号代替。 还公开了一种具有比较器和触发器的可锁定比较器。 比较器具有斜坡输入，控制输入，第一参考输入和第二参考输入。 当触发器的复位输入处于非复位状态时，触发器向第一和第二参考输入中的每一个提供锁存信号，并且所述比较器产生第一状态并维持锁存信号，直到接收到复位信号。

公开(公告)号：US5689199A

公开(公告)日：1997-11-18

申请号：US518765

申请日：1995-08-24

申请人： Ricardo Erckert

发明人： Ricardo Erckert

IPC分类号： H03K3/2897 ,  H03F3/345 ,  H03F3/45 ,  H03K3/0231 ,  H03K3/0233 ,  H03K5/08 ,  H03K5/24 ,  H03K17/30 ,  H03K5/153 ,  H03K3/037

CPC分类号： H03K5/2418 ,  H03F3/345 ,  H03K17/30 ,  H03K3/0231

摘要： A comparator with hysteresis in bipolar technology having a voltage/current converter with a voltage input forming the comparator input connection, and a current output, a bistable current source with a current feeding connection coupled with the current output of the voltage/current converter and a current output connection forming the comparator output, the bistable current source being currentless in a first stable state and consuming current only in the second stable state, the firing current which must be fed to the current feeding connection to switch the bistable current source from the currentless state to the power-consuming state being different from the quenching current which must be fed to the current feeding connection to switch the bistable current source from the power-consuming state to the currentless state, to obtain a hysteresis of the comparator, and all transistors being formed as bipolar transistors. The entire power consumption of such a comparator can be made extremely low in one of its two switching positions.

摘要翻译： 具有双极性技术中具有迟滞的比较器具有具有形成比较器输入连接的电压输入的电压/电流转换器和电流输出，具有与电压/电流转换器的电流输出耦合的电流馈送连接的双稳态电流源和 电流输出连接形成比较器输出，双稳态电流源无电流处于第一稳定状态，并且仅在第二稳定状态下消耗电流，该点火电流必须馈送到电流馈电连接以将双稳态电流源从无电流 状态到功耗状态不同于必须馈送到电流馈电连接以将双稳态电流源从功耗状态切换到无电流状态的淬灭电流，以获得比较器的滞后，并且所有晶体管 被形成为双极晶体管。 这种比较器的整个功耗在其两个开关位置中的一个中可以非常低。

公开(公告)号：US5420530A

公开(公告)日：1995-05-30

申请号：US327813

申请日：1994-10-17

申请人： Rikitaro Mita

发明人： Rikitaro Mita

IPC分类号： G01R19/165 ,  H03K3/2897 ,  H03K5/08 ,  H03K5/24 ,  H03K5/153 ,  H03K5/22

CPC分类号： H03K3/2897 ,  H03K5/2418

摘要： A voltage comparator for comparing an input voltage with a comparison voltage having a hysteresis characteristic. The comparison voltage is derived by combining a voltage drop developed across a fixed resistor by supplying a constant current therethrough from a constant current source and a reference voltage from a constant voltage source.

摘要翻译： 一种电压比较器，用于将输入电压与具有滞后特性的比较电压进行比较。 通过将固定电阻器上产生的电压降从恒定电流源提供恒定电流和来自恒定电压源的参考电压来组合比较电压。

公开(公告)号：US5099142A

公开(公告)日：1992-03-24

申请号：US581453

申请日：1990-09-11

申请人： Claude Barre

发明人： Claude Barre

IPC分类号： H03K3/0233 ,  H03K3/2897

CPC分类号： H03K3/2897

摘要： A trigger circuit with switching hysteresis includes first, second and third current sources. A first transistor pair is supplied by the first current source and has transistors with coupled emitters, load circuits and input circuits. The input circuit of one of the transistors of the first pair is acted upon by a reference potential and the input circuit of the other of the transistors of the first pair being acted upon by an input signal. Load resistors are each connected in the load circuit of a respective one of the transistors of the first pair. A coupling resistor interconnects the load circuits of the transistors of the first pair. A second transistor pair is supplied by the second current source and has transistors with coupled emitters, load circuits directly coupled with corresponding load circuits of the transistors of the first pair and input circuits cross-coupled with corresponding load circuits of the transistors of the first pair. A third transistor pair is supplied by the third current source and has transistors with coupled emitters, load circuits and input circuits being coupled with corresponding load circuits of the transistors of the first pair. Further load resistors are each connected in the load circuit of a respective one of the transistors of the third pair.

摘要翻译： 具有开关滞后的触发电路包括第一，第二和第三电流源。 第一晶体管对由第一电流源提供，并具有耦合的发射极，负载电路和输入电路的晶体管。 第一对晶体管中的一个晶体管的输入电路受到参考电位的作用，第一对晶体管的另一个的输入电路由输入信号作用。 负载电阻各自连接在第一对晶体管的相应一个的负载电路中。 耦合电阻器互连第一对晶体管的负载电路。 第二晶体管对由第二电流源提供并具有耦合发射极的晶体管，负载电路直接与第一对晶体管的相应负载电路耦合，输入电路与第一对晶体管的相应负载电路交叉耦合 。 第三晶体管对由第三电流源提供，并且具有耦合的发射极，负载电路和输入电路的晶体管与第一对晶体管的相应负载电路耦合。 另外的负载电阻各自连接在第三对晶体管的相应一个的负载电路中。

公开(公告)号：US4977336A

公开(公告)日：1990-12-11

申请号：US328378

申请日：1989-03-23

申请人： Ingo A. Martiny

发明人： Ingo A. Martiny

IPC分类号： H03K3/0233 ,  H03K3/2897

CPC分类号： H03K3/2897

摘要： A schmitt-trigger circuit includes a differential amplifier (1), formed of at least two transistors (2, 3) having their emitters coupled to at least a first current source (4). The differential amplifier (1) has a first input for receiving an input signal (Ue) and has one output coupled, via a first current mirror (5) and a feedback transistor (8), to the second input, from which output an output signal is taken. The second input of the differential amplifier (1) is coupled to a second current source (9) as well as to a diode array which comprises at least two diode elements (10, 11) and which is arranged in parallel with the first current mirror (5) and the feedback transistor (8).

摘要翻译： 施密特触发电路包括由至少两个晶体管（2,3）形成的差分放大器（1），其具有耦合到至少第一电流源（4）的发射极。 差分放大器（1）具有用于接收输入信号（Ue）的第一输入端，并且具有经由第一电流镜（5）和反馈晶体管（8）耦合到第二输入端的一个输出端，输出端 信号被采取。 差分放大器（1）的第二输入端耦合到第二电流源（9）以及二极管阵列，该二极管阵列包括至少两个二极管元件（10,11）并且与第一电流镜 （5）和反馈晶体管（8）。

公开(公告)号：US4587444A

公开(公告)日：1986-05-06

申请号：US513057

申请日：1983-07-12

申请人： Shinji Emori ,  Yoshio Watanabe

发明人： Shinji Emori ,  Yoshio Watanabe

IPC分类号： H04L25/03 ,  H03K3/2897 ,  H03K5/08 ,  H03K5/24 ,  H03K19/003 ,  H03K19/086

CPC分类号： H03K5/2418 ,  H03K3/2897

摘要： A variable-threshold-type differential signal receiver comprises a differential amplifier for comparing differential voltages of differential input signals with a predetermined threshold voltage so as to provide logical output signals. It further comprises an emitter follower and an impedance means, the output of the emitter follower being superimposed through the impedance means on one of the differential input signals, whereby the predetermined threshold voltage is variably controlled by controlling the input voltage of the first emitter follower.

摘要翻译： 可变阈值型差分信号接收机包括差分放大器，用于将差分输入信号的差分电压与预定阈值电压进行比较，以便提供逻辑输出信号。 它还包括射极跟随器和阻抗装置，射极跟随器的输出通过阻抗装置叠加在差分输入信号之一上，由此通过控制第一射极跟随器的输入电压来可变地控制预定阈值电压。