公开(公告)号：US20030129845A1

公开(公告)日：2003-07-10

申请号：US10346887

申请日：2003-01-17

Inventor： Cleopatra Cabuz ,  Max C. Glenn ,  Francis M. Erdmann ,  Robert D. Horning

IPC: H01L021/311

CPC classification number: B81C1/00365 ,  B81C2201/0164 ,  Y10T428/21 ,  Y10T428/2495

Abstract: Layers of boron-doped silicon having reduced out-of-plane curvature are disclosed. The layers have substantially equal concentrations of boron near the top and bottom surfaces. Since the opposing concentrations are substantially equal, the compressive stresses on the layers are substantially balanced, thereby resulting in layers with reduced out-of-plane curvature.

公开(公告)号：US06544655B1

公开(公告)日：2003-04-08

申请号：US09634932

申请日：2000-08-08

Applicant: Cleopatra Cabuz ,  Max C. Glenn ,  Francis M. Erdmann ,  Robert D. Horning

Inventor： Cleopatra Cabuz ,  Max C. Glenn ,  Francis M. Erdmann ,  Robert D. Horning

IPC: B32B904

CPC classification number: B81C1/00365 ,  B81C2201/0164 ,  Y10T428/21 ,  Y10T428/2495

Abstract: Layers of boron-doped silicon having reduced out-of-plane curvature are disclosed. The layers have substantially equal concentrations of boron near the top and bottom surfaces. Since the opposing concentrations are substantially equal, the compressive stresses on the layers are substantially balanced, thereby resulting in layers with reduced out-of-plane curvature.

公开(公告)号：US20020179563A1

公开(公告)日：2002-12-05

申请号：US09873931

申请日：2001-06-04

Inventor： Robert D. Horning ,  David W. Burns

IPC: C23F001/00

CPC classification number: B81C1/00595 ,  B81B2201/0264 ,  B81C2201/0164

Abstract: A method of making a silicon micromechanical structure, from a lightly doped silicon substrate having less than

Abstract translation: 从其中具有小于5×10 19 cm -3的硼的轻掺杂硅衬底制造硅微机械结构的方法。 将硼含量大于7×1019cm-3，锗含量约为1×10 21 cm -3的p +层置于衬底上。 在第二面上形成掩模，然后蚀刻到p +层。 将绝缘体放在p +层上，并在其上制造电子部件。 优选的微机械结构是压力传感器，悬臂加速度计和双网双平面加速度计。 优选的电子部件是介电离子压敏电阻器和共振微束。 该方法可以包括在p +层上形成轻掺杂层以在蚀刻之前形成掩埋的p +层的步骤。

公开(公告)号：US06479315B1

公开(公告)日：2002-11-12

申请号：US09724514

申请日：2000-11-27

Applicant: Andrew J. Zosel ,  Peter M. Gulvin ,  Jingkuang Chen ,  Joel A. Kubby ,  Chuang-Chia Lin ,  Alex T. Tran

Inventor： Andrew J. Zosel ,  Peter M. Gulvin ,  Jingkuang Chen ,  Joel A. Kubby ,  Chuang-Chia Lin ,  Alex T. Tran

IPC: H01L2100

CPC classification number: B81C1/00666 ,  B81B2203/058 ,  B81C2201/014 ,  B81C2201/0164 ,  B81C2201/056 ,  G02B26/0833

Abstract: The present invention provides a micromechanical or microoptomechanical structure. The structure is produced by a process comprising defining a structure on a single crystal silicon layer separated by an insulator layer from a substrate layer; depositing and etching a polysilicon layer on the single crystal silicon layer, with remaining polysilicon forming mechanical or optical elements of the structure; exposing a selected area of the single crystal silicon layer; and releasing the formed structure.

Abstract translation: 本发明提供一种微机械或微机电结构。 该结构通过包括在衬底层上限定由绝缘体层分离的单晶硅层上的结构的方法制造; 沉积和蚀刻单晶硅层上的多晶硅层，剩余的多晶硅形成结构的机械或光学元件; 暴露单晶硅层的选定区域; 并释放形成的结构。

公开(公告)号：US5922212A

公开(公告)日：1999-07-13

申请号：US663001

申请日：1996-06-07

Applicant: Kazuhiko Kano ,  Kenichi Nara ,  Toshimasa Yamamoto ,  Nobuyuki Kato ,  Yoshitaka Gotoh ,  Yoshinori Ohtsuka ,  Kenichi Ao

Inventor： Kazuhiko Kano ,  Kenichi Nara ,  Toshimasa Yamamoto ,  Nobuyuki Kato ,  Yoshitaka Gotoh ,  Yoshinori Ohtsuka ,  Kenichi Ao

IPC: B81B3/00 ,  B81C1/00 ,  G01P15/08 ,  G01P15/125 ,  C23F1/00

CPC classification number: G01P15/125 ,  B81B3/0072 ,  B81C1/00666 ,  G01P15/0802 ,  B81C2201/0164 ,  B81C2201/0167 ,  B81C2201/017 ,  G01P2015/0814

Abstract: A semiconductor sensor having a thin-film structure body, in which thin-film structure is prevented from bending due to the internal stress distribution in the thickness direction, is disclosed. A silicon-oxide film is formed as a sacrificial layer on a silicon substrate, and a polycrystalline-silicon thin film is formed on the silicon-oxide film. Thereafter, phosphorus (P) is ion-implanted in the surface of the polycrystalline-silicon thin film, and thereby the surface state of the polycrystalline-silicon thin film is modified. A portion of distribution of stress existing in the thickness direction of the polycrystalline-silicon thin film is changed by this modification, and stress distribution is adjusted. By removal of the silicon-oxide film, a movable member of the polycrystalline-silicon thin film is disposed above the silicon substrate with a gap interposed therebetween.

Abstract translation: 公开了一种具有薄膜结构体的半导体传感器，其薄膜结构被防止由于厚度方向上的内部应力分布而弯曲。 在硅衬底上形成氧化硅膜作牺牲层，在氧化硅膜上形成多晶硅薄膜。 此后，将磷（P）离子注入多晶硅薄膜的表面，从而改变多晶硅薄膜的表面状态。 通过该变形例改变在多晶硅薄膜的厚度方向上存在的应力分布的一部分，并且调整应力分布。 通过去除氧化硅膜，多晶硅薄膜的可移动部件设置在硅衬底之上，其间插入间隙。

公开(公告)号：US5110373A

公开(公告)日：1992-05-05

申请号：US565253

申请日：1990-08-09

Applicant: Philip E. Mauger

Inventor： Philip E. Mauger

IPC: C23C14/00 ,  C25F3/12 ,  H01L21/3063

CPC classification number: B81C1/00666 ,  C23C14/0005 ,  C25F3/12 ,  H01L21/3063 ,  B81B2203/0127 ,  B81C2201/0164 ,  Y10S148/159 ,  Y10S438/938 ,  Y10S438/977

Abstract: A method for fabricating a silicon membrane with predetermined stress characteristics. A silicon substrate is doped to create a doped layer as thick as the desired thickness of the membrane. Stress within the doped layer is controlled by selecting the dopant based on its atomic diameter relative to silicon and controlling both the total concentration and concentration profile of the dopant. The membrane is then formed by electrochemically etching away the substrate beneath the doped layer.

Abstract translation: 一种制备具有预定应力特性的硅膜的方法。 掺杂硅衬底以产生如期望的膜厚度那样厚的掺杂层。 通过基于其相对于硅的原子直径选择掺杂剂并控制掺杂剂的总浓度和浓度分布来控制掺杂层内的应力。 然后通过电化学蚀刻掉掺杂层下面的衬底形成膜。