公开(公告)号：US20080116512A1

公开(公告)日：2008-05-22

申请号：US11943181

申请日：2007-11-20

申请人： Yusuke Kawaguchi ,  Miwako Akiyama ,  Yoshihiro Yamaguchi

发明人： Yusuke Kawaguchi ,  Miwako Akiyama ,  Yoshihiro Yamaguchi

IPC分类号： H01L29/78 ,  H01L21/336

CPC分类号： H01L29/7811 ,  H01L29/0634 ,  H01L29/1095 ,  H01L29/41766 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7813

摘要： A semiconductor device includes a first conductivity type layer and a second conductivity type layer, which are alternately and repeatedly positioned, adjacent to each other, in a column-like fashion on a first conductivity type substrate. The balance of the net charge amount of the impurity between the first conductivity type layer formed under a second conductivity type base layer in the termination region of the semiconductor device and the second conductivity type layer adjacent to the first conductivity type layer is imbalanced in comparison to the balance of the net charge amount of the impurity between the first conductivity type layer in the device-forming region of the semiconductor device and the second conductivity type layer adjacent to the first conductivity type layer.

摘要翻译： 半导体器件包括在第一导电类型衬底上以列状方式彼此相邻地交替地和重复地定位的第一导电类型层和第二导电类型层。 半导体器件的端接区域内的第二导电型基底层下方形成的第一导电型层与第一导电型层相邻的第二导电型层之间的杂质的净电荷量的平衡与第 半导体器件的器件形成区域中的第一导电型层与第一导电型层相邻的第二导电型层之间的杂质的净电荷量的平衡。

公开(公告)号：US20080099837A1

公开(公告)日：2008-05-01

申请号：US11924175

申请日：2007-10-25

申请人： Miwako AKIYAMA ,  Akio Nakagawa ,  Yusuke Kawaguchi ,  Syotaro Ono ,  Yoshihiro Yamaguchi

发明人： Miwako AKIYAMA ,  Akio Nakagawa ,  Yusuke Kawaguchi ,  Syotaro Ono ,  Yoshihiro Yamaguchi

IPC分类号： H01L29/94

CPC分类号： H01L29/7813 ,  H01L29/0623 ,  H01L29/0634 ,  H01L29/1095 ,  H01L29/41766

摘要： This semiconductor device an epitaxial layer of a first conductivity type formed on a surface of the first semiconductor layer, and a base layer of a second conductivity type formed on a surface of the epitaxial layer. A diffusion layer of a first conductivity type is selectively formed in the base layer, and a trench penetrates the base layer to reach the epitaxial layer. A gate electrode is formed in the trench through the gate insulator film formed on the inner wall of the trench. A first buried diffusion layer of a second conductivity type is formed in the epitaxial layer deeper than the bottom of the gate electrode. A second buried diffusion layer connects the first buried diffusion layer and the base layer and has a resistance higher than that of the first buried diffusion layer.

摘要翻译： 该半导体器件形成在第一半导体层的表面上的第一导电类型的外延层和形成在外延层的表面上的第二导电类型的基极层。 在基底层中选择性地形成第一导电类型的扩散层，并且沟槽穿透基底层以到达外延层。 通过形成在沟槽内壁上的栅极绝缘膜，在沟槽中形成栅电极。 在比栅电极的底部更深的外延层中形成第二导电类型的第一掩埋扩散层。 第二掩埋扩散层连接第一掩埋扩散层和基底层，并且具有比第一掩埋扩散层的电阻高的电阻。

公开(公告)号：US20080066596A1

公开(公告)日：2008-03-20

申请号：US11596677

申请日：2005-05-20

申请人： Yoshihiro Yamaguchi ,  Satoshi Ohnishi

发明人： Yoshihiro Yamaguchi ,  Satoshi Ohnishi

IPC分类号： B26D5/02 ,  B23K26/08 ,  B23K7/10 ,  B26D1/00 ,  B26D5/00

CPC分类号： F16P3/147 ,  B23K7/002 ,  B23K7/10 ,  B23K10/00 ,  B23K10/006 ,  B23K26/0876 ,  B23K26/142 ,  B23K26/38 ,  B23K26/702 ,  B23K37/006 ,  B23K2101/18 ,  B23Q15/08 ,  F16P3/141 ,  F16P3/144 ,  G05B2219/43124 ,  G05B2219/45044 ,  G05B2219/49074 ,  Y10T83/05 ,  Y10T83/081 ,  Y10T83/8726

摘要： In a thermal cutting machine such as plasma cutting machine or a laser cutting machine, control of the moving speed of a cutting head (24) is improved so as to increase throughput of the cutting machine with increase in cost restricted. Products are cut out one by one from a plate member (14) while a cutting head (24) is moved relative to the plate member (14) on a table (12). In this process, when the cutting head (24) is fast-forwarded without performing cutting to a position at which cutting of each product starts, the speed of movement in the direction (Y-axis direction) along a short side of the table (12) is controlled at a speed higher than that of the movement in the direction (X-axis direction) along a long side of the table. The pattern of a sequence of cutting out the products from the plate member (14) is a meandering pattern in which reciprocation in the Y-axis direction dominates and the movement in the X-direction is one time one way. Exhaust chambers are arranged in the X-axis direction in the table (12), and the exhaust chambers are driven as the cutting head (24) moves in the X-axis direction.

摘要翻译： 在诸如等离子切割机或激光切割机之类的热切割机中，提高了切割头（24）的移动速度的控制，从而在成本受到限制的情况下增加切割机的生产量。 当切割头（24）相对于板构件（14）移动到工作台（12）上时，从板构件（14）逐个切割产品。 在该过程中，当切割头（24）不进行切割到每个产品的切割开始的位置而快进时，沿着桌子的短边方向（Y轴方向）的移动速度 12）以比桌子长边方向（X轴方向）移动速度高的速度进行控制。 从板构件（14）切出产品的顺序的图案是在Y轴方向上的往复运动占主导地位且X方向移动一次的曲折图案。 在台（12）中排列室沿X轴方向排列，当切割头（24）沿X轴方向移动时，排气室被驱动。

公开(公告)号：US07301178B2

公开(公告)日：2007-11-27

申请号：US11212602

申请日：2005-08-29

申请人： Yoshihiro Yamaguchi ,  Kenji Oota

发明人： Yoshihiro Yamaguchi ,  Kenji Oota

IPC分类号： H01L29/74

CPC分类号： H01L29/0661 ,  H01L24/72 ,  H01L29/0615 ,  H01L29/0657 ,  H01L29/32 ,  H01L29/74 ,  H01L2924/0102 ,  H01L2924/1301 ,  H01L2924/00

摘要： A P++-type first diffusion layer is formed by diffusing P-type impurities on a front side of an N−-type semiconductor substrate, and an N-type fourth diffusion layer which is shallower than the first diffusion layer is formed by diffusing N-type impurities on the front side, and a P-type second diffusion layer is locally formed in a ring-shape so as to be exposed on the lateral side by diffusing P-type impurities on the back side, and P-type impurities are diffused on the back side of the substrate and a P+-type third diffusion layer is locally formed so as to be distributed inward from the second diffusion layer and not to be exposed to the lateral side, and the P-type second diffusion layer and the P+-type third diffusion layer are formed in the two-stage structure, thereby various characteristics can be improved.

摘要翻译： AP ++类型的第一扩散层是通过在N +型半导体衬底的正面扩散P型杂质形成的，N型第四扩散层 通过在前侧扩散N型杂质而形成比第一扩散层浅的层，并且P型第二扩散层局部形成为环状，以便通过扩散P而暴露在侧面 型杂质，P型杂质扩散到基板的背面，局部地形成P +型第三扩散层，以从第二层向内分布 扩散层并且不暴露于侧面，并且P型第二扩散层和P + +型第三扩散层形成在两级结构中，因此可以有各种特性 改进。

公开(公告)号：US20070262410A1

公开(公告)日：2007-11-15

申请号：US11742133

申请日：2007-04-30

申请人： Syotaro Ono ,  Yusuke Kawaguchi ,  Yoshihiro Yamaguchi ,  Miwako Akiyama

发明人： Syotaro Ono ,  Yusuke Kawaguchi ,  Yoshihiro Yamaguchi ,  Miwako Akiyama

IPC分类号： H01L29/00

CPC分类号： H01L29/872 ,  H01L27/0727 ,  H01L29/66143 ,  H01L29/8725

摘要： A semiconductor device includes: a semiconductor layer of a first conductivity type, a plurality of trenches provided on a major surface side of the semiconductor layer, an insulating film provided on an inner wall surface and on top of the trench, a conductive material surrounded by the insulating film and filling the trench, a first semiconductor region of a second conductivity type provided between the trenches, a second semiconductor region of the first conductivity type provided in a surface portion of the first semiconductor region, a mesa of the semiconductor layer provided between the trenches of a Schottky barrier diode region adjacent to a transistor region including the first semiconductor region and the second semiconductor region, a control electrode connected to the conductive material filling the trench of the transistor region and a main electrode provided in contact with a surface of the first semiconductor region, the second semiconductor region, a surface of the mesa and a part of the conductive material filling the trench of the Schottky barrier diode region. The part is exposed through the insulating film.

摘要翻译： 半导体器件包括：第一导电类型的半导体层，设置在半导体层的主表面侧的多个沟槽，设置在内壁表面上和沟槽顶部上的绝缘膜，由 绝缘膜并填充沟槽，设置在沟槽之间的第二导电类型的第一半导体区域，设置在第一半导体区域的表面部分中的第一导电类型的第二半导体区域，设置在第一半导体区域之间的半导体层的台面 与包括第一半导体区域和第二半导体区域的晶体管区域相邻的肖特基势垒二极管区域的沟槽，连接到填充晶体管区域的沟槽的导电材料的控制电极和与第一半导体区域和第二半导体区域的表面接触的主电极 第一半导体区域，第二半导体区域，台面的表面 以及填充肖特基势垒二极管区域的沟槽的导电材料的一部分。 该部件通过绝缘膜曝光。

公开(公告)号：US20070066654A1

公开(公告)日：2007-03-22

申请号：US11513174

申请日：2006-08-31

申请人： Shozo Koyama ,  Yoshihiro Yamaguchi

发明人： Shozo Koyama ,  Yoshihiro Yamaguchi

IPC分类号： A61K31/445 ,  A61K31/40 ,  A61K31/13 ,  A61K31/12

CPC分类号： C11D3/0084 ,  A01N35/06 ,  A61K8/35 ,  A61K31/12 ,  A61K31/122 ,  A61K31/13 ,  A61K31/40 ,  A61K31/445 ,  A61Q5/02 ,  A61Q19/00 ,  C08F2/38

摘要： A method for inhibiting or blocking molecular generating and/or inducing functions of molecules using an inhibitory or blocking agent of the formula: wherein R1-6 are as defined herein.

摘要翻译： 使用下式的抑制性或阻断剂抑制或阻断分子产生和/或诱导分子功能的方法：其中R1-6如本文所定义。

公开(公告)号：US20070023793A1

公开(公告)日：2007-02-01

申请号：US11484664

申请日：2006-07-12

申请人： Yoshihiro Yamaguchi ,  Yusuke Kawaguchi ,  Syotaro Ono

发明人： Yoshihiro Yamaguchi ,  Yusuke Kawaguchi ,  Syotaro Ono

IPC分类号： H01L29/76 ,  H01L21/336

CPC分类号： H01L29/7813 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/66734

摘要： Disclosed is a trench-gate semiconductor device including: a trench gate structure; a source layer having a first conductivity type, facing a gate electrode via a gate insulating film, and having a top plane; a base layer having a second conductivity type, being adjacent to the source layer, and facing the gate electrode via the gate insulating film; a semiconductor layer having the first conductivity type, being adjacent to the base layer, and facing the gate electrode via the gate insulating film without contacting the source layer; and a contact layer having the second conductivity type, contacting the source layer and base layer, having a top plane continuing with the top plane of the source layer, and having two or more peaks in an impurity concentration value profile in a depth direction from the top plane thereof, the peaks being positioned shallower than a formed depth of the source layer.

摘要翻译： 公开了一种沟槽栅半导体器件，包括：沟槽栅极结构; 具有第一导电类型的源极层，经由栅极绝缘膜面对栅电极，并具有顶面; 具有第二导电类型的基底层，与源极层相邻，并且经由栅极绝缘膜面对栅电极; 具有第一导电类型的半导体层，与基底层相邻，并且经由栅极绝缘膜面对栅电极而不接触源极层; 以及具有第二导电类型的接触层，与源极层和基极层接触，具有与源极层的顶部平面连续的顶面，并且具有两个或更多个沿着深度方向的杂质浓度值分布中的峰 峰位于比源层的形成深度浅的位置。

公开(公告)号：US07143355B2

公开(公告)日：2006-11-28

申请号：US10085655

申请日：2002-02-26

申请人： Yoshihiro Yamaguchi ,  Shinsuke Noguchi

发明人： Yoshihiro Yamaguchi ,  Shinsuke Noguchi

IPC分类号： G06F3/00 ,  G06F15/16 ,  G06F9/44

CPC分类号： G06F3/038 ,  G06F1/1616 ,  G06F1/169 ,  G06F3/0362 ,  H04M1/233

摘要： A jog dial server monitors an operation notification by a jog dial, then decides the operation based on the operation notification, and executes the decided operation as a jog script engine. The jog dial server loads a script file describing status transition of the jog dial in the script language at the time of start-up, then reads the status transition, and operates in accordance with the status transition thus read. Thus, an information processing device is provided which enables extension of the operation with respect to an application incompatible with the jog dial.

摘要翻译： 慢跑拨号服务器通过微动拨盘监视操作通知，然后基于操作通知来决定操作，并且作为点动指令引擎执行所确定的操作。 慢跑拨号服务器在启动时以脚本语言加载描述慢速拨盘的状态转换的脚本文件，然后读取状态转换，并根据读取的状态转换进行操作。 因此，提供了一种信息处理装置，其能够相对于与微动拨盘不兼容的应用来扩展操作。

公开(公告)号：US07133641B2

公开(公告)日：2006-11-07

申请号：US10497513

申请日：2003-04-23

申请人： Tsutomi Ieki ,  Yoshihiro Yamaguchi

发明人： Tsutomi Ieki ,  Yoshihiro Yamaguchi

IPC分类号： H04B7/00 ,  H04B1/40 ,  H04Q5/22

CPC分类号： G06K19/0723 ,  H04B1/44 ,  H04B1/48

摘要： A wireless communication RF circuit includes a transmitting-and-receiving antenna, a modulator circuit, an SPST switching circuit, and a demodulator circuit, which are arranged in a sequence. Upon signal reception, the SPST switching circuit is switched ON, and the demodulator circuit extracts a signal wave from a signal received by the antenna and outputs the signal wave to a control circuit. Upon signal transmission, the SPST switching circuit is switched OFF, and the modulator circuit mixes transmission data supplied from the control circuit with a carrier and outputs the carrier to the antenna. Only a single antenna is required. Upon signal reception, the influence of the modulator circuit is negligible. Upon signal transmission, the SPST switching circuit is switched OFF, thus the effect of the demodulator circuit is negligible, which greatly reduces loss.

摘要翻译： 无线通信RF电路包括按顺序排列的发送和接收天线，调制器电路，SPST切换电路和解调器电路。 信号接收后，SPST切换电路接通，解调电路从天线接收的信号中提取信号波，并将信号波输出到控制电路。 信号传输时，SPST切换电路切换为OFF，调制电路将从控制电路提供的发送数据与载波混合，并将载波输出到天线。 只需要一根天线。 在信号接收时，调制器电路的影响可以忽略不计。 在信号传输时，SPST切换电路关闭，解调电路的影响可以忽略不计，大大降低了损耗。

公开(公告)号：US20050183040A1

公开(公告)日：2005-08-18

申请号：US11099136

申请日：2005-04-05

申请人： Hirohito Kondo ,  Tomoki Shiono ,  Yoshihiro Yamaguchi ,  Takahiko Sueyoshi

发明人： Hirohito Kondo ,  Tomoki Shiono ,  Yoshihiro Yamaguchi ,  Takahiko Sueyoshi

IPC分类号： G06F3/02 ,  G06F1/16 ,  G06F3/00 ,  G06F3/023 ,  G06F3/033 ,  G06F3/048 ,  G09G5/00

CPC分类号： G06F1/1616 ,  G06F1/1632 ,  G06F1/1635 ,  G06F1/1679 ,  G06F1/1686 ,  G06F1/169 ,  G06F3/0362 ,  G06F3/04847 ,  G06F3/04897 ,  G06F2203/04806

摘要： [Object]The object of the present invention is to make the setting condition of menu items easily adjustable on the setting screen with regard to the predetermined object to be operated. [Solution]According to the present invention, since the camera setting utility screen 320 for the CCD camera 23 is displayed on the liquid crystal display 21, any one of the plural number of menu items is selected from said camera setting utility screen 320 displayed according to the rotation operation and the push operation of the jog dial 30, the setting condition with regard to the menu item selected is adjusted corresponding to the rotation operation and the push operation of the jog dial 30, and the CCD camera 23 is to be set to said setting condition adjusted, the whole processing from the selection of menu item to the adjustment of setting condition can be conducted only by the rotation operation and the push operation of the jog dial 30.

摘要翻译： 本发明的目的是使菜单项的设置条件在设定画面上相对于要操作的预定对象容易调节。 [解决方案]根据本发明，由于用于CCD摄像机23的照相机设置实用画面320显示在液晶显示器21上，所以根据相机设置实用程序屏幕320选择多个菜单项中的任何一个， 对于微动拨盘30的旋转操作和按压操作，根据微动拨盘30的旋转操作和按压操作来调整关于所选择的菜单项的设置条件，并且将CCD相机23设置 在调整到所述设定条件的情况下，可以仅通过微动拨盘30的旋转操作和按压操作来进行从菜单项的选择到设置条件的调整的整个处理。