DISPLAY DEVICE
    31.
    发明申请
    DISPLAY DEVICE 审中-公开

    公开(公告)号:US20190267440A1

    公开(公告)日:2019-08-29

    申请号:US16287983

    申请日:2019-02-27

    Abstract: A display device includes: a substrate; an inorganic insulating layer arranged in a display region, the inorganic insulating layer having a lower valley as an opening or a groove arranged in a region between a first pixel circuit and a second pixel circuit adjacent to each other; a first organic planarization layer arranged over entire regions of the first pixel circuit and the second pixel circuit, the first organic planarization layer filling the lower valley; and a connection wire arranged on the first organic planarization layer, the connection wire connecting the first pixel circuit to the second pixel circuit.

    Display apparatus
    34.
    发明授权

    公开(公告)号:US09905630B2

    公开(公告)日:2018-02-27

    申请号:US15375206

    申请日:2016-12-12

    CPC classification number: H01L27/3276 H01L27/3258 H01L51/5237 H01L51/5253

    Abstract: A display apparatus includes a substrate, a display unit over the substrate, the display unit including a thin film transistor, a display element connected to the thin film transistor, and a planarization layer between the thin film transistor and the display element. The display unit includes a display area to display an image, and a non-display area outside of the display area. The non-display area includes a plurality of voltage lines. The planarization layer extends into the non-display area and includes a divisional portion that divides the planarization layer into a central portion and a peripheral portion. The divisional portion surrounds the display area. An interlayer insulating film is between voltage lines at intersections of the voltage lines with each other in the divisional portion. A protecting film covers a side of the interlayer insulating film in the divisional portion.

    Display device
    35.
    发明授权

    公开(公告)号:US12238988B2

    公开(公告)日:2025-02-25

    申请号:US17526348

    申请日:2021-11-15

    Abstract: A display device includes a substrate including a display area and a peripheral area disposed outside of the display area. The display area includes a plurality of pixels. The display device further includes an inorganic insulating layer disposed in the display area. The inorganic insulating layer includes a groove disposed in a region between the plurality of pixels. The display device further includes an organic material layer filling the groove, a first connection wiring, and a second connection wiring. The first connection wiring is disposed on the organic material layer, overlaps the plurality of pixels, and extends in a second direction. The second connection wiring is insulated from the first connection wiring, and extends in a first direction that crosses the second direction.

    Display panel
    36.
    发明授权

    公开(公告)号:US12223910B2

    公开(公告)日:2025-02-11

    申请号:US18490828

    申请日:2023-10-20

    Abstract: A display panel includes a transistor, a light emitting device electrically connected to the transistor, a connection wiring electrically connecting the transistor to the light emitting device and including side surfaces, a capping pattern disposed on the transistor and contacting at least a side surface among side surfaces, an upper insulating layer disposed on the transistor and including a first opening that overlaps the at least the side surface, and a pixel definition layer disposed on the upper insulating layer and covering the first opening of the upper insulating layer.

    Gate driver and display device including the same

    公开(公告)号:US11978402B2

    公开(公告)日:2024-05-07

    申请号:US18174521

    申请日:2023-02-24

    CPC classification number: G09G3/3241 G09G3/3266 H03K17/6872

    Abstract: A gate driver includes: a signal generator configured to generate a gate signal, and output the gate signal to a first output terminal; and an inverted signal generator configured to generate an inverted gate signal based on the gate signal, and output the inverted gate signal to a second output terminal, wherein the inverted signal generator includes: a first transistor connected between a first node connected to the second output terminal and a first driving power supply terminal, and including a PMOS transistor; and a second transistor connected between the first node and a second driving power supply terminal, and including an NMOS transistor, and wherein a second node connected to the first output terminal is connected to a gate electrode of each of the first and second transistors.

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