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    Pixel and organic light emitting diode display device using the same
    31.
    发明授权
    Pixel and organic light emitting diode display device using the same 有权
    像素和有机发光二极管显示装置使用相同

    公开(公告)号：US09524667B2

    公开(公告)日：2016-12-20

    申请号：US14038594

    申请日：2013-09-26

    Applicant: Samsung Display Co., Ltd.

    Inventor： Hai-Jung In ,  Jung-Bae Kim ,  Bo-Yong Chung

    IPC: G09G3/30 ,  G09G3/32

    CPC classification number: G09G3/3233 ,  G09G3/3208 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2300/0852 ,  G09G2300/0861 ,  G09G2300/0876 ,  G09G2310/0251 ,  G09G2310/0262 ,  G09G2310/061 ,  G09G2320/043 ,  G09G2320/045

    Abstract: A pixel circuit for an organic light emitting diode (OLED) display is disclosed. One inventive aspect includes an organic light emitting diode, a first transistor, a storage unit, a second transistor and a third transistor. The first transistor controls the amount of current flowing from a first power source coupled to a second power source via a second node and the organic light emitting diode in response to a voltage at a first node. The storage unit is connected to a data line, and stores a data signal from the data line. The second transistor is connected to a fourth node and the first node and is turned on when a second control signal is supplied. The third transistor is connected to the first node and a third node and is turned on when a third control signal is supplied.

    Abstract translation: 公开了一种用于有机发光二极管（OLED）显示器的像素电路。 本发明的一个方面包括有机发光二极管，第一晶体管，存储单元，第二晶体管和第三晶体管。 第一晶体管响应于第一节点处的电压控制经由第二节点耦合到第二电源的第一电源和有机发光二极管的电流量。 存储单元连接到数据线，并存储来自数据线的数据信号。 第二晶体管连接到第四节点和第一节点，并且当提供第二控制信号时被接通。 第三晶体管连接到第一节点和第三节点，并且当提供第三控制信号时被接通。

    SCAN LINE DRIVER
    32.
    发明申请
    SCAN LINE DRIVER 有权
    扫描线驱动器

    公开(公告)号：US20160210937A1

    公开(公告)日：2016-07-21

    申请号：US14708117

    申请日：2015-05-08

    Applicant: Samsung Display Co., Ltd.

    Inventor： Bo-Yong CHUNG ,  Dong-Gyu Kim ,  Hae-Yeon Lee ,  Hai-Jung In

    IPC: G09G5/20

    CPC classification number: G09G3/3674 ,  G09G3/3266 ,  G09G2310/0267 ,  G09G2310/0289 ,  G11C19/287

    Abstract: A scan line driver is disclosed. In one aspect, the scan line driver includes a driving signal generation circuit, an output line driving circuit, and a carry transfer circuit. The driving signal generation circuit is configured to generate first and second driving signals based on a plurality of clock signals and a carry signal from a previous scan line driver. The output line driving circuit is configured to generate a scan line enable signal based on the first and second driving signals. The carry transfer circuit is configured to generate a carry signal based on the first and second driving signals.

    Abstract translation: 公开了扫描线驱动器。 一方面，扫描线驱动器包括驱动信号生成电路，输出线驱动电路和进位传送电路。 驱动信号生成电路被配置为基于多个时钟信号和来自先前的扫描线驱动器的进位信号来产生第一和第二驱动信号。 输出线驱动电路被配置为基于第一和第二驱动信号产生扫描线使能信号。 进位传送电路被配置为基于第一和第二驱动信号产生进位信号。

    Driver and display device including the same
    33.
    发明授权
    Driver and display device including the same 有权

    公开(公告)号：US11847948B1

    公开(公告)日：2023-12-19

    申请号：US18088999

    申请日：2022-12-27

    Applicant: Samsung Display Co., LTD.

    Inventor： Hai-Jung In

    IPC: G09G3/20

    CPC classification number: G09G3/20 ,  G09G2300/0426 ,  G09G2300/08 ,  G09G2310/06 ,  G09G2310/08 ,  G09G2320/02 ,  G09G2320/043

    Abstract: A driver includes first to Mth stages, where a first input signal and a second input signal are input to each of the first to Mth stages, and each of the first to Mth stages outputs a stage output signal, a first carry signal, and a second carry signal, where M is a natural number greater than or equal to 2. The first carry signal and the second carry signal output from a kth stage are the first input signal and the second input signal, which are input to a (k+1)th stage, respectively, where k is a natural number greater than or equal to 1 and less than M, and the first input signal and the second input signal, which are input to a first stage, are a first start signal and a second start signal which are alternately changed for predetermined frame times, respectively.

    Display apparatus including clock wiring overlapping shielding pattern and gate pattern for reducing bezel area
    35.
    发明授权
    Display apparatus including clock wiring overlapping shielding pattern and gate pattern for reducing bezel area 有权

    公开(公告)号：US11588005B2

    公开(公告)日：2023-02-21

    申请号：US17158368

    申请日：2021-01-26

    Applicant: Samsung Display Co., Ltd.

    Inventor： Hai-Jung In

    IPC: H01L27/32 ,  H01L27/12

    Abstract: A display apparatus includes: a display panel; a driving circuit which provides a driving signal to the display panel and includes at least one driving transistor; and a clock signal wiring for providing a clock signal to the driving circuit. The driving circuit includes an active pattern, a gate pattern, a source pattern, and a shielding pattern, the gate pattern overlaps the active pattern in a plan view, a major surface plane of the source pattern is disposed in a layer different from a layer the active pattern is disposed in, the source pattern is electrically connected to the active pattern, the shielding pattern is disposed between the gate pattern and the clock signal wiring and applied with a constant voltage, and the clock signal wiring overlaps the gate pattern in the plan view and is disposed on the source pattern.

    DISPLAY DEVICE AND A TESTING METHOD THEREOF
    36.
    发明申请
    DISPLAY DEVICE AND A TESTING METHOD THEREOF 审中-公开

    公开(公告)号：US20200090566A1

    公开(公告)日：2020-03-19

    申请号：US16572700

    申请日：2019-09-17

    Applicant: SAMSUNG DISPLAY CO., LTD.

    Inventor： Kwang Sae Lee ,  Ji-Hyun Ka ,  Won Kyu Kwak ,  Ki Myeong Eom ,  Hai-Jung In

    IPC: G09G3/00 ,  G01R27/08 ,  G01R31/28

    Abstract: A display device including: a substrate including a display area and a peripheral area peripheral to the display area; a plurality of pads disposed in a pad area, wherein the pad area is disposed in the peripheral area and the pad area includes an integrated circuit (IC); and a first crack detecting line connected to a first pad and a second pad at a first node, and a third pad at a second node, wherein the first crack detecting line is disposed in the peripheral area between the first node and the second node.

    Scanline driver and display device including the same
    37.
    发明授权
    Scanline driver and display device including the same 有权

    公开(公告)号：US10235926B2

    公开(公告)日：2019-03-19

    申请号：US15354835

    申请日：2016-11-17

    Applicant: Samsung Display Co., Ltd.

    Inventor： Hai-Jung In ,  Bo-Yong Chung

    IPC: G09G3/20 ,  G09G3/36 ,  H01L27/12 ,  G09G3/3266

    Abstract: A scanline driver and a display device including the same are disclosed. In one aspect, the scanline driver includes a driving circuit configured to provide a first driving signal to a first driving node and a second driving signal to a second driving node based on a scan input signal and a plurality of clock signals. The driving circuit includes a plurality of driving transistors and a plurality of reset transistors. The scanline driver also includes a buffer circuit configured to generate a scan output signal based on the first and second driving signals. The buffer circuit includes a plurality of buffer transistors. Each of the driving transistors and the buffer transistors includes a floating gate transistor which includes a floating gate configured to transfer a voltage corresponding to a second logic low level lower than a first logic low level.

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