DC-BLOCKING AMPLIFIER WITH ALIASING TONE CANCELLATION CIRCUIT

    公开(公告)号:US20220407476A1

    公开(公告)日:2022-12-22

    申请号:US17751630

    申请日:2022-05-23

    Applicant: MEDIATEK INC.

    Abstract: The present invention provides an amplifier circuit, wherein the amplifier circuit includes an input terminal, a capacitor, an amplifier, a feedback circuit and an aliasing tone cancellation circuit. The input terminal is configured to receive a first input signal. The capacitor is coupled to the input terminal. The amplifier is configured to receive the input signal through the capacitor to generate an output signal. The feedback circuit is coupled between an input node and an output node of the amplifier, and is configured to generate a feedback signal according to the output signal, wherein the feedback circuit includes a storage block including a switched-capacitor. The aliasing tone cancellation circuit is coupled between the input terminal of the amplifier circuit and the input node of the amplifier, and configured to generate a signal to cancel or reduce an aliasing tone of the feedback signal according to the input signal.

    High linearity digital-to-analog converter with ISI-suppressing method

    公开(公告)号:US10763884B2

    公开(公告)日:2020-09-01

    申请号:US16515056

    申请日:2019-07-18

    Applicant: MEDIATEK INC.

    Abstract: A digital-to-analog conversion circuit is used for converting a first digital input into a first analog output, and includes a segmentation circuit, a plurality of multi-bit dynamic element matching digital-to-analog converters (DEM DACs), and a combination circuit. The segmentation circuit applies segmentation to the first digital input to generate a plurality of code segments. The multi-bit DEM DACs convert the code segments into a plurality of DAC outputs, respectively, wherein the multi-bit DEM DACs include at least a first multi-bit DEM DAC and a second multi-bit DEM DAC, and the first multi-bit DEM DAC and the second multi-bit DEM DAC employ different DEM techniques. The combination circuit combines the DAC outputs to generate the first analog output.

    HIGH LINEARITY DIGITAL-TO-ANALOG CONVERTER WITH ISI-SUPPRESSING METHOD

    公开(公告)号:US20200028519A1

    公开(公告)日:2020-01-23

    申请号:US16515056

    申请日:2019-07-18

    Applicant: MEDIATEK INC.

    Abstract: A digital-to-analog conversion circuit is used for converting a first digital input into a first analog output, and includes a segmentation circuit, a plurality of multi-bit dynamic element matching digital-to-analog converters (DEM DACs), and a combination circuit. The segmentation circuit applies segmentation to the first digital input to generate a plurality of code segments. The multi-bit DEM DACs convert the code segments into a plurality of DAC outputs, respectively, wherein the multi-bit DEM DACs include at least a first multi-bit DEM DAC and a second multi-bit DEM DAC, and the first multi-bit DEM DAC and the second multi-bit DEM DAC employ different DEM techniques. The combination circuit combines the DAC outputs to generate the first analog output.

    Impedance circuit with poly-resistor

    公开(公告)号:US10510823B2

    公开(公告)日:2019-12-17

    申请号:US15693548

    申请日:2017-09-01

    Applicant: MEDIATEK INC.

    Abstract: An impedance circuit includes a poly-resistor and a controller. The poly-resistor has a first terminal and a second terminal. The controller generates a first control voltage and a second control voltage. The resistance between the first terminal and the second terminal of the poly-resistor is determined according to the first control voltage and the second control voltage. The second control voltage is different from the first control voltage. The proposed impedance circuit can improve the linearity of the poly-resistor.

    Calibration method and calibration module thereof for vibration device

    公开(公告)号:US10117036B2

    公开(公告)日:2018-10-30

    申请号:US14179525

    申请日:2014-02-12

    Applicant: MEDIATEK INC.

    Abstract: A calibration method for a vibration module includes transmitting a plurality of vibration signals corresponding to a plurality of vibration frequencies to the vibration module and detecting a plurality of input currents or input power levels of the vibration module corresponding to the plurality of vibration frequencies; and determining a vibration point of the vibration module according to the plurality of input currents or input power levels.

    Devices and methods for headphone speaker impedance detection

    公开(公告)号:US09794669B2

    公开(公告)日:2017-10-17

    申请号:US14337392

    申请日:2014-07-22

    Applicant: MediaTek Inc.

    CPC classification number: H04R1/1041 H04R3/007 H04R5/04 H04R29/001

    Abstract: An electronic device includes an impedance detection circuit and a processor. The impedance detection circuit is configured for receiving a test signal, processing the test signal and detecting an impedance of a headphone speaker load by using the test signal to generate a detection result. The processor is coupled to the impedance detection circuit and configured for providing the test signal to the impedance detection circuit, receiving the detection result from the impedance detection circuit, and adjusting a voltage of an audio signal to be provided to the headphone speaker load according to the detection result.

    Calibration Method and Calibration Module Thereof for Vibration Device
    39.
    发明申请
    Calibration Method and Calibration Module Thereof for Vibration Device 审中-公开
    振动装置的校准方法及其校准模块

    公开(公告)号:US20140161266A1

    公开(公告)日:2014-06-12

    申请号:US14179525

    申请日:2014-02-12

    Applicant: MEDIATEK INC.

    CPC classification number: H04R29/001 H04R2400/03

    Abstract: A calibration method for a vibration module includes transmitting a plurality of vibration signals corresponding to a plurality of vibration frequencies to the vibration module and detecting a plurality of input currents or input power levels of the vibration module corresponding to the plurality of vibration frequencies; and determining a vibration point of the vibration module according to the plurality of input currents or input power levels.

    Abstract translation: 一种用于振动模块的校准方法包括将与多个振动频率对应的多个振动信号发送到振动模块,并检测与多个振动频率对应的振动模块的多个输入电流或输入功率电平; 以及根据所述多个输入电流或输入功率电平确定所述振动模块的振动点。

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