公开(公告)号：US20140169235A1

公开(公告)日：2014-06-19

申请号：US13715893

申请日：2012-12-14

Applicant: BROADCOM CORPORATION

Inventor： Mohyee Mikhemar ,  Hooman Darabi

IPC: H01Q1/50 ,  H04L5/14

CPC classification number: H01Q1/50 ,  H03H7/38 ,  H03H7/463 ,  H04B1/44 ,  H04B1/525 ,  H04L5/14

Abstract: A circuit for a wideband electrical balance duplexer (EBD) may include a first impedance element and a second impedance coupled between a first and a second node and a second and a third node of the bridge circuit, respectively. An antenna may be coupled between the first and a fourth node of the bridge circuit to receive and transmit RF signals. A balancing network may provide an impedance substantially matching an impedance of the antenna. The balancing network may be coupled between the third and the fourth node of the bridge circuit. The first or the second impedance elements may facilitate balancing the bridge circuit. One or more output nodes of a transmit path may be coupled to an input node of the bridge circuit. One or more input nodes of a receive path may be coupled between the second and the fourth node of the bridge circuit.

Abstract translation: 用于宽带电平衡双工器（EBD）的电路可以分别包括耦合在第一和第二节点与桥接电路的第二和第三节点之间的第一阻抗元件和第二阻抗。 天线可以耦合在桥接电路的第一和第四节点之间以接收和发射RF信号。 平衡网络可以提供基本上匹配天线的阻抗的阻抗。 平衡网络可以耦合在桥接电路的第三和第四节点之间。 第一或第二阻抗元件可以有助于桥接电路的平衡。 发射路径的一个或多个输出节点可以耦合到桥接电路的输入节点。 接收路径的一个或多个输入节点可以耦合在桥接电路的第二和第四节点之间。

公开(公告)号：US20130259163A1

公开(公告)日：2013-10-03

申请号：US13901500

申请日：2013-05-23

Applicant: Broadcom Corporation

Inventor： Mohyee Mikhemar ,  Amir Hadji-Abdolhamid ,  Hooman Darabi

IPC: H04L25/06

CPC classification number: H03H11/1217 ,  H03F1/0205 ,  H03F1/086 ,  H03F3/19 ,  H03F3/45076 ,  H03F2200/294 ,  H03F2200/451 ,  H03F2200/91 ,  H03F2203/45332 ,  H03F2203/45336 ,  H03G1/0005 ,  H03G1/0029 ,  H03G3/3068 ,  H03G3/32 ,  H03H11/1252 ,  H03H11/1256 ,  H03H11/1291 ,  H03H2210/025 ,  H04B1/123 ,  H04B1/16 ,  H04L25/06

Abstract: According to one embodiment, a compact low-power receiver comprises first and second analog circuits connected by a digitally controlled interface circuit. The first analog circuit has a first direct-current (DC) offset and a first common mode voltage at an s output, and the second analog circuit has a second DC offset and a second common mode voltage at an input. The digitally controlled interface circuit connects the output to the input, and is configured to match the first and second DC offsets and to match the first and second common mode voltages. In one embodiment, the first analog circuit is a variable gain control transimpedance amplifier (TTA) implemented using a current mode to buffer, the second analog circuit is a second-order adjustable low-pass filter, whereby a three-pole adjustable low-pass filter in the compact low-power receiver is effectively produced.

Abstract translation: 根据一个实施例，紧凑型低功率接收机包括由数字控制接口电路连接的第一和第二模拟电路。 第一模拟电路在s输出具有第一直流（DC）偏移和第一共模电压，并且第二模拟电路在输入端具有第二DC偏移和第二共模电压。 数字控制接口电路将输出连接到输入，并且被配置为匹配第一和第二DC偏移并且匹配第一和第二共模电压。 在一个实施例中，第一模拟电路是使用电流模式进行缓冲实现的可变增益控制跨阻抗放大器（TTA），第二模拟电路是二阶可调低通滤波器，由此三极可调低通滤波器 滤波器在紧凑型低功率接收机中得到有效的生产。