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公开(公告)号：US20230314888A1
公开(公告)日：2023-10-05
申请号：US18021205
申请日：2022-03-10
Inventor： Xiao WANG , Yan YAN , Yu MA , Weitao CHEN , Jiliang ZHANG
IPC: G02F1/1362 , G02F1/1333 , G06F3/041
CPC classification number: G02F1/13629 , G02F1/13338 , G06F3/04164 , G06F3/0412
Abstract: An array substrate including: a substrate; a data line on the base substrate and extending in a first direction; and a touch signal line on the base substrate, wherein an extending direction of the touch signal line is the same as an extending direction of the data line; the data line and the touch signal line are in different layers and insulated from each other, and an orthographic projection of the touch signal line on the base substrate at least partially overlaps an orthographic projection of the data line on the base substrate.
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公开(公告)号：US20220346291A1
公开(公告)日：2022-10-27
申请号：US17433164
申请日：2021-02-07
Inventor： Yaya QI , Dianzheng DONG , Yan YAN , Xiao WANG , Xue WANG , Tingting WANG , Xiaoying LI , Zhiqiang MA
IPC: H05K9/00
Abstract: The present disclosure provides a display substrate, including: a display area and a bonding area positioned on a side of the display area, the bonding area includes a plurality of bonding sub-areas arranged at intervals, the bonding sub-areas are arranged along a direction in which an edge of the display area extends and configured for bonding a chip-on-film, where a first antistatic layer is further arranged on the bonding area, at least a part of the first antistatic layer is positioned between adjacent ones of the bonding sub-areas, and the first antistatic layer is electrically coupled to a reference signal terminal. The present disclosure further provides a display device.
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Patent Agency Ranking
33.发明申请公开(公告)号：US20220139350A1
公开(公告)日：2022-05-05
申请号：US17435209
申请日：2021-02-07
Inventor： Tingting WANG , Qi WANG , Yan YAN , Xue WANG
IPC: G09G3/36
Abstract: The present disclosure provides common voltage compensation method and device for display panel, a display panel, and a display device. The display panel includes a common electrode, a common voltage compensation unit, and common electrode lines. The common electrode lines are sequentially numbered according to a distance from the common voltage compensation unit, a number of the common electrode lines is n, and n is an integer greater than 8. The method includes: the common voltage compensation unit providing common voltage to the common electrode; the common voltage compensation unit detecting actual common voltage on one of N1-th common electrode line to N2-th common electrode line, N1 being a value rounded down from n/8, and N2 being a value rounded down from n/4; the common voltage compensation unit compensating the common voltage of the common electrode according to the detected actual common voltage.
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公开(公告)号：US20210325695A1
公开(公告)日：2021-10-21
申请号：US16344930
申请日：2018-09-19
Inventor： Tingting WANG , Qi WANG , Yan YAN
Abstract: The present disclosure relates to spectacles. The spectacles include a lens including a first portion and a second portion disposed opposite each other and a first cavity between the first portion and the second portion, a frame surrounding the lens and supporting the lens, a colored liquid disposed in the interior space, a first hydrophobic dielectric film disposed on an inner surface of the frame, a first electrode disposed between the inner surface of the frame and the first hydrophobic dielectric film, and a second electrode disposed in the interior space and in contact with the colored liquid. The frame has a second cavity defined by an inner surface of the frame. The second cavity is in communication with the first cavity to form an interior space.
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公开(公告)号：US20180233210A1
公开(公告)日：2018-08-16
申请号：US15503830
申请日：2016-08-25
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Mingfu HAN , Guangliang SHANG , Yuanbo ZHANG , Yujie GAO , Yan YAN , Yingmeng MIAO , Seungwoo HAN , Zhihe JIN , Xing YAO , Haoliang ZHENG
CPC classification number: G11C19/287 , G09G3/20 , G09G2300/0426 , G09G2310/0245 , G09G2310/0267 , G09G2310/0286 , G11C19/28
Abstract: A supplement resetting module for a gate driver circuit, including a pull-up control unit, a pull-down control unit, a clock signal input end, a predetermined level input end, a first control signal input end, a second control signal input end and a signal output end. A control end of the pull-up control unit is connected to the clock signal input end, an output end of the pull-up control unit is connected to the signal output end, a first control end of the pull-down control unit is connected to the first control signal input end, a second control end of the pull-down control unit is connected to the second control signal input end, an input end of the pull-down control unit is connected to the predetermined level input end, and an output end of the pull-down control unit is connected to the signal output end.
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公开(公告)号：US20160027372A1
公开(公告)日：2016-01-28
申请号：US14431488
申请日：2014-06-30
Inventor： Yan YAN
CPC classification number: G09G3/2092 , G02F1/136204 , G02F2001/133388 , G09G3/006 , G09G3/20 , G09G3/3611 , G09G2330/025 , G09G2330/04 , G09G2330/06 , G09G2330/08 , H01L27/0296
Abstract: An array substrate, a display panel and a display device are provided. The array substrate includes a plurality of data lines, a plurality of gate lines, a first lead and/or a second lead. Where the array substrate includes the first lead, at least one data line is connected with the first lead on the array substrate through at least one first electrostatic discharging device, and each first electrostatic discharging device is connected with only one data line; where the array substrate includes the second lead, at least one gate line is connected with the second lead on the array substrate through at least one second electrostatic discharging device, and each second electrostatic discharging device is connected with only one gate line. The array substrate can avoid breakdown and damage of circuits due to a large amount of accumulated charges in circuits while the display panel is squeezed or rubbed.
Abstract translation: 提供阵列基板，显示面板和显示装置。 阵列基板包括多条数据线，多条栅极线，第一引线和/或第二引线。 在阵列基板包括第一引线的情况下，至少一条数据线通过至少一个第一静电放电装置与阵列基板上的第一引线连接，并且每个第一静电放电装置仅与一条数据线连接; 其中阵列基板包括第二引线，至少一个栅极线通过至少一个第二静电放电装置与阵列基板上的第二引线连接，并且每个第二静电放电装置仅与一条栅极线连接。 阵列基板可以避免由于在显示面板被挤压或摩擦时在电路中的大量累积电荷导致电路的击穿和损坏。
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37.发明申请SHIFT REGISTER UNIT, SHIFT REGISTER, GATE DRIVE CIRCUIT AND DISPLAY APPARATUS 有权移位寄存器单元，移位寄存器，门控驱动电路和显示设备公开(公告)号：US20150332784A1
公开(公告)日：2015-11-19
申请号：US14548920
申请日：2014-11-20
Inventor： Yan YAN
CPC classification number: G11C19/28 , G09G3/3611 , G09G3/3677 , G09G2310/0286
Abstract: To provide a shift register unit, which comprises a positive control signal input terminal, a reverse control signal input terminal, a first thin film transistor, a second thin film transistor, a positive input terminal, a reverse input terminal, a pull-up module and a first reset module, a gate of the first thin film transistor is connected with the positive input terminal, a first electrode of the first thin film transistor is connected with the positive control signal input terminal, a second electrode of the first thin film transistor is connected with a pull-up node of the pull-up module, a gate of the second thin film transistor is connected with the reverse input terminal, a first electrode of the second thin film transistor is connected with the pull-up node of the pull-up module, a second electrode of the second thin film transistor is connected with the reverse control signal input terminal.
Abstract translation: 提供一种移位寄存器单元，其包括正控制信号输入端，反向控制信号输入端，第一薄膜晶体管，第二薄膜晶体管，正输入端，反向输入端，上拉模块 以及第一复位模块，所述第一薄膜晶体管的栅极与所述正输入端子连接，所述第一薄膜晶体管的第一电极与所述正极控制信号输入端子连接，所述第一薄膜晶体管的第二电极 与所述上拉模块的上拉节点连接，所述第二薄膜晶体管的栅极与所述反向输入端子连接，所述第二薄膜晶体管的第一电极与所述第二薄膜晶体管的上拉节点连接， 上拉模块，第二薄膜晶体管的第二电极与反向控制信号输入端连接。
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