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公开(公告)号:US20240130187A1
公开(公告)日:2024-04-18
申请号:US18016931
申请日:2022-01-28
Inventor: Hong Liu , Jingyi Xu , Peng Liu , Yongqiang Zhang , Bo Huang , Guodong Wang , Wanzhi Chen
IPC: H10K59/131 , H10K59/12 , H10K59/80
CPC classification number: H10K59/1315 , H10K59/1201 , H10K59/8792
Abstract: The application provides a display substrate, a method for manufacturing the same, and a display device. The display substrate includes a display region and a binding region located at a periphery of the display region. The binding region is provided with a drive circuit pin and a flexible circuit board pin, and a connecting trace for connecting the drive circuit pin and the flexible circuit board pin. The connecting trace includes a first connecting line and a second connecting line connected in parallel, the first connecting line and the second connecting line are in different layers, the first connecting line is between an interlayer insulating layer and a base substrate of the display substrate, the first connecting line and the interlayer insulating layer are separated by a first insulating layer, and the second connecting line is on a side of the interlayer insulating layer away from the base substrate.
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公开(公告)号:US11630534B2
公开(公告)日:2023-04-18
申请号:US16476621
申请日:2019-01-10
Inventor: Yun Qiao , Zhen Wang , Xiaozhou Zhan , Han Zhang , Wenwen Qin , Peng Liu , Zhengkui Wang
Abstract: A wiring structure includes a plurality of first connection lines disposed in a first wiring layer and extending respectively from first ones of the plurality of first electrical contacts to first ones of the plurality of second electrical contacts, the first connection lines not intersecting each other; and a plurality of second connection lines disposed in a second wiring layer and extending respectively from second ones of the plurality of first electrical contacts to second ones of the plurality of second electrical contacts, the second connection lines not intersecting each other. An orthographic projection of any one of the first connection lines onto a plane parallel to the first and second wiring layers does not intersect an orthographic projection of any one of the second connection lines onto the plane.
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33.
公开(公告)号:US20220100028A1
公开(公告)日:2022-03-31
申请号:US17228811
申请日:2021-04-13
Inventor: Hong Liu , Jingyi Xu , Peng Liu , Yongqiang Zhang , Bo Li , Peirong Huo
IPC: G02F1/1335
Abstract: Provided is a black matrix structure including a plurality of crossed black matrix strips. A side surface of the black matrix strip has a roughness less than 2 μm and is intersected with a reference plane. The reference plane being parallel to a plane defined by crossing of the plurality of black matrix strips.
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公开(公告)号:US11189230B2
公开(公告)日:2021-11-30
申请号:US16768395
申请日:2019-12-16
Inventor: Zhichong Wang , Fuqiang Li , Jing Feng , Xinglong Luan , Peng Liu
IPC: G09G3/3258
Abstract: A display device, a pixel compensation circuit and a driving method thereof are disclosed. The pixel compensation circuit includes: a driving transistor, an initialization circuit, a storage circuit, a first data writing circuit, a second data writing circuit, a compensation circuit and a light emitting control circuit. A first terminal of the storage circuit is coupled to the gate electrode of the drive transistor, and the first data writing circuit is configured to write a data signal to a second terminal of the storage circuit. The second data writing circuit is configured to change a potential of the second terminal of the storage circuit so that a potential of the first terminal of the storage circuit is associated with the data signal. The compensation circuit is configured to charge the first terminal of the storage circuit so that it is associated with a threshold voltage of the drive transistor.
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公开(公告)号:US11127735B2
公开(公告)日:2021-09-21
申请号:US16433599
申请日:2019-06-06
Inventor: Yanwei Ren , Jingyi Xu , Wulijibaier Tang , Tianlei Shi , Min Liu , Peng Liu
Abstract: A display substrate comprises a display area and a non-display area around the display area; at least one ground terminal located in the non-display area; a first wiring disposed in the non-display area and being around the display area; and a second wiring disposed between the first wiring and the display area and being positioned around the non-display area. The second wiring is provided with at least one tip on a side closer to the first wiring, the at least one tip pointing to the side of the first wiring. The first wiring and the second wiring are respectively connected to the at least one ground terminal.
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公开(公告)号:US10996529B2
公开(公告)日:2021-05-04
申请号:US16634701
申请日:2018-12-12
IPC: G02F1/1362 , G02F1/1345 , G02F1/1368 , G09G3/36
Abstract: An array substrate includes plural sub-pixels in plural rows and plural columns; plural data ports; Ndl data lines, each of the Ndl data lines connecting to a column of sub-pixels, the Ndl data lines being divided into plural groups, each group including N data lines; and a multiplexer including M control lines and plural switching units in one-to-one correspondence with the Ndl data lines, each control line being connected to and controlling Ndl M switching units. All of the N data lines in each group are connected to one data port through N switching units, respectively, the data lines in different groups are connected to different data ports, the N switching units corresponding to each group are controlled by N different control lines, respectively, and at least two of the N data lines in each group are provided with a data line another group therebetween.
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公开(公告)号:US10930360B2
公开(公告)日:2021-02-23
申请号:US16242472
申请日:2019-01-08
Inventor: Peng Liu , Jun Fan , Yusheng Liu , Bailing Liu , Han Zhang , Zhen Wang , Yun Qiao , Zhengkui Wang , Lele Cong , Mei Li
Abstract: A shift register includes a first input sub-circuit configured to transfer a first input signal at a first input terminal to a first node in response to a first scan signal at a first scan terminal being active, a first level control sub-circuit configured to transfer a first power supply voltage at a first power supply terminal to a first output control node and a second output control node in response to the first node being at an active potential, and an output sub-circuit configured to transfer a first clock signal at a first clock terminal to a first output in response to the first output control node being at an active potential, and to transfer a second clock signal at a second clock terminal to a second output terminal in response to the second output control node being at an active potential.
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38.
公开(公告)号:US10290252B2
公开(公告)日:2019-05-14
申请号:US15175409
申请日:2016-06-07
Inventor: Chung Chun Chen , Mubing Li , Peng Liu , Pengcheng Lu , Xue Dong
Abstract: An image display method is disclosed. The image display method is adapted to a delta pixel arrangement display device, and the delta pixel arrangement display device includes M×N second pixels arranged in form of an M×N matrix. The display method includes: acquiring raw data of a frame of image, the raw data including luminance information of a*M×b*N first pixels arranged in form of an a*M×b*N matrix, where a≥1, b≥1 and a×b≠1, the first pixels arranged in strip and the first pixel at least including sub-pixels with three different colors RGB; converting the raw data into display data, the display data including luminance information of M×N second pixels, and each of the second pixels at least comprising respective sub-pixels of corresponding one of the first pixels; and displaying an image according to the display data. An image display apparatus and a delta pixel arrangement display device are further disclosed.
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公开(公告)号:US10134823B2
公开(公告)日:2018-11-20
申请号:US15122338
申请日:2015-10-30
Inventor: Shengji Yang , Xue Dong , Haisheng Wang , Peng Liu , Hailin Xue , Yiming Zhao , Minghua Xuan
IPC: H01L27/32
Abstract: An organic light emitting diode (OLED) display, a display device and a manufacturing method thereof are provided. The OLED display includes a base substrate; and OLED pixel units arranged on the base substrate in a matrix. Each OLED pixel unit includes at least one OLED structure, and the OLED structure includes a cathode layer, an anode layer and an organic light emitting layer located therebetween, and the OLED pixel unit further includes a pixel circuit that is connected correspondingly with the OLED structure and configured to drive it to illuminate light. The pixel circuit includes a switching unit and a capacitor located above or below the layer in which the switching unit is located.
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40.
公开(公告)号:US10062312B2
公开(公告)日:2018-08-28
申请号:US15122634
申请日:2015-09-29
Inventor: Peng Liu , Xue Dong , Renwei Guo , Chungchun Chen
IPC: G09G3/20
CPC classification number: G09G3/2003 , G09G3/20 , G09G3/2074 , G09G2320/0295 , G09G2320/0666 , G09G2360/16
Abstract: The present disclosure relates to a method and an apparatus for discriminating luminance backgrounds for images and a display apparatus thereof. The method comprises the steps of: receiving image information that is to be discriminated, the image information comprising gray scale values for respective sub-pixels in each pixel; forming the gray scale values for specific sub-pixels of pixels within the s±mth row and the t±nth column in the image information, having a pixel of the sth row, tth column as the center, into a digit group, and arranging the digit group in order, wherein s, m, t and n are natural numbers; if the gray scale values for N greater specific sub-pixels in the digit group are all greater than a given gray scale value, and a variance is less than or equal to a specified threshold, it is determined that the specific sub-pixels within the s±mth row and the t±nth column are a high-luminance background region; otherwise, it is determined that the specific sub-pixels within the s±mth row and the t±nth column are a non-high-luminance background region. By means of the method of the present disclosure, an image region can be discriminated as a high-luminance region or a non-high-luminance region.
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