公开(公告)号：US20100240184A1

公开(公告)日：2010-09-23

申请号：US12626959

申请日：2009-11-30

申请人： Eun-ji Jung ,  Hyun-soo Kim ,  Byung-hee Kim ,  Dae-yong Kim ,  Woong-hee Sohn ,  Kwang-jin Moon ,  Jang-hee Lee ,  Min-sang Song ,  Eun-ok Lee

发明人： Eun-ji Jung ,  Hyun-soo Kim ,  Byung-hee Kim ,  Dae-yong Kim ,  Woong-hee Sohn ,  Kwang-jin Moon ,  Jang-hee Lee ,  Min-sang Song ,  Eun-ok Lee

IPC分类号： H01L21/336 ,  H01L21/28

CPC分类号： H01L21/28052 ,  H01L29/4236

摘要： A method of forming a buried gate electrode prevents voids from being formed in a silicide layer of the gate electrode. The method begins by forming a trench in a semiconductor substrate, forming a conformal gate oxide layer on the semiconductor in which the trench has been formed, forming a first gate electrode layer on the gate oxide layer, forming a silicon layer on the first gate electrode layer to fill the trench. Then, a portion of the first gate electrode layer is removed to form a recess which exposed a portion of a lateral surface of the silicon layer. A metal layer is then formed on the semiconductor substrate including on the silicon layer. Next, the semiconductor substrate is annealed while the lateral surface of the silicon layer is exposed to form a metal silicide layer on the silicon layer.

摘要翻译： 形成掩埋栅电极的方法防止在栅电极的硅化物层中形成空隙。 该方法开始于在半导体衬底中形成沟槽，在已经形成沟槽的半导体上形成共形栅极氧化层，在栅极氧化层上形成第一栅电极层，在第一栅电极上形成硅层 层填补沟槽。 然后，去除第一栅极电极层的一部分以形成暴露硅层的侧表面的一部分的凹部。 然后在包括硅层的半导体衬底上形成金属层。 接下来，半导体衬底退火，同时暴露硅层的侧表面以在硅层上形成金属硅化物层。

公开(公告)号：US07501673B2

公开(公告)日：2009-03-10

申请号：US11214680

申请日：2005-08-29

申请人： Jae-Hwa Park ,  Hee-Sook Park ,  Dae-Yong Kim ,  Jang-Hee Lee

发明人： Jae-Hwa Park ,  Hee-Sook Park ,  Dae-Yong Kim ,  Jang-Hee Lee

IPC分类号： H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L319/119

CPC分类号： H01L21/823828 ,  H01L21/823835 ,  H01L21/823842

摘要： In one embodiment, a semiconductor device includes a semiconductor substrate and a doped conductive layer formed over the semiconductor substrate. A diffusion barrier layer is formed over the doped conductive layer. The diffusion barrier layer may be formed from an amorphous semiconductor material. An ohmic contact layer is formed over the diffusion barrier layer. A metal barrier layer is formed over the ohmic contact layer. A metal layer is formed over the metal barrier layer.

摘要翻译： 在一个实施例中，半导体器件包括形成在半导体衬底上的半导体衬底和掺杂导电层。 在掺杂导电层上方形成扩散阻挡层。 扩散阻挡层可以由非晶半导体材料形成。 在扩散阻挡层上形成欧姆接触层。 金属阻挡层形成在欧姆接触层上。 在金属阻挡层上形成金属层。

公开(公告)号：US20080079056A1

公开(公告)日：2008-04-03

申请号：US11648595

申请日：2007-01-03

申请人： Tae-Ho Cha ,  Gil-Heyun Choi ,  Byung-Hee Kim ,  Hee-Sook Park ,  Jang-Hee Lee ,  Geum-Jung Seong

发明人： Tae-Ho Cha ,  Gil-Heyun Choi ,  Byung-Hee Kim ,  Hee-Sook Park ,  Jang-Hee Lee ,  Geum-Jung Seong

IPC分类号： H01L29/76

CPC分类号： H01L29/4941 ,  H01L27/105 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11526 ,  H01L27/11536 ,  H01L27/11568 ,  H01L29/513

摘要： A semiconductor memory device, e.g., a charge trapping type non-volatile memory device, may include a charge trapping structure formed in a first area of a substrate and a gate structure formed in a second area of the substrate. The charge trapping structure may include a tunnel oxide layer pattern, a charge trapping layer pattern and a dielectric layer pattern of aluminum-containing tertiary metal oxide. The gate structure may include a gate oxide layer pattern, a polysilicon layer pattern and an ohmic layer pattern of aluminum-containing tertiary metal silicide. A first electrode and a second electrode may be formed on the charge trapping structure. A lower electrode and an upper electrode may be provided on the gate structure. The dielectric layer pattern may have a higher dielectric constant, and the ohmic layer pattern may have improved thermal stability, thereby enhancing programming and erasing operations of the charge trapping type non-volatile memory device.

摘要翻译： 半导体存储器件，例如电荷俘获型非易失性存储器件，可以包括形成在衬底的第一区域中的电荷俘获结构和形成在衬底的第二区域中的栅极结构。 电荷捕获结构可以包括隧道氧化物层图案，电荷俘获层图案和含铝三级金属氧化物的介电层图案。 栅极结构可以包括栅极氧化物层图案，多晶硅层图案和含铝三次金属硅化物的欧姆层图案。 第一电极和第二电极可以形成在电荷捕获结构上。 可以在栅极结构上设置下电极和上电极。 电介质层图案可以具有更高的介电常数，并且欧姆层图案可以具有改善的热稳定性，从而增强电荷俘获型非易失性存储器件的编程和擦除操作。

公开(公告)号：US06167712A

公开(公告)日：2001-01-02

申请号：US09391158

申请日：1999-09-08

申请人： Jae-Hoon Lim ,  Jae-Eok Shim ,  Han-Joo Yoo ,  Yoon-Young Kim ,  Jang-Hee Lee ,  Yo-Hyun Song ,  Chi-Seong Oh ,  Kyong-Jun Baek ,  Joong-Yeob Kim ,  Young-Rak Kim

发明人： Jae-Hoon Lim ,  Jae-Eok Shim ,  Han-Joo Yoo ,  Yoon-Young Kim ,  Jang-Hee Lee ,  Yo-Hyun Song ,  Chi-Seong Oh ,  Kyong-Jun Baek ,  Joong-Yeob Kim ,  Young-Rak Kim

IPC分类号： F25B504

CPC分类号： F25B5/04 ,  F25B47/022 ,  F25B2600/112 ,  F25B2600/2511 ,  F25D17/065 ,  F25D2317/0682 ,  F25D2700/02 ,  Y02B30/743

摘要： A method for controlling a refrigerator having a direction control valve drives a refrigerating fan for a predetermined time when a refrigerant passage is converted to make a refrigerant from a condenser firstly pass a refrigerating evaporator, and enhances a cooling efficiency by applying a residual cool air of the refrigerating evaporator to a refrigerating compartment, after the refrigerating compartment reaches a steady state in a refrigerator having a refrigerating evaporator embodied as an intercooler evaporator. The method includes the steps of: (a) determining whether a refrigerating compartment temperature sensed by a refrigerating compartment temperature sensor reaches a refrigerating compartment set temperature to determine a steady state of a refrigerating compartment; (b) if it is determined that the steady state of the refrigerating compartment in the step (a), switching a direction control valve, and allowing a refrigerant to firstly pass a refrigerating evaporator; (c) if the direction control valve is switched in the step (b), driving a refrigerating fan for a predetermined time simultaneously driving a freezing fan; and (d) if the refrigerating fan is driven for the predetermined time in the step (c), stopping the refrigerating fan.

摘要翻译： 一种用于控制具有方向控制阀的冰箱的方法，当制冷剂通道被转换以使来自冷凝器的制冷剂首先通过冷藏蒸发器时，驱动冷藏风扇达预定时间，并且通过施加冷却风扇的残留冷空气来提高冷却效率 在具有实施为中间冷却器蒸发器的制冷蒸发器的冰箱中，在冷藏室达到稳定状态之后，将制冷蒸发器连接到冷藏室。 该方法包括以下步骤：（a）确定由冷藏室温度传感器感测到的冷藏室温度是否达到冷藏室设定温度，以确定冷藏室的稳定状态; （b）如果确定步骤（a）中的冷藏室的稳定状态，切换方向控制阀并使制冷剂首先通过冷藏蒸发器; （c）如果在步骤（b）中切换方向控制阀，则同时驱动冷冻风扇同时驱动冷藏风扇达预定时间; 和（d）如果在步骤（c）中将制冷风扇驱动预定时间，则停止制冷风扇。

公开(公告)号：US5752568A

公开(公告)日：1998-05-19

申请号：US325028

申请日：1994-10-18

申请人： Jang Hee Lee

发明人： Jang Hee Lee

IPC分类号： A23B7/04 ,  A23B7/10 ,  F25D23/12 ,  F25D25/00 ,  F25D31/00 ,  H01R13/44 ,  F25B29/00

CPC分类号： F25D23/12 ,  F25D25/005 ,  H01R13/44 ,  F25D2400/04 ,  F25D31/005

摘要： A refrigerator has a compartment for fermenting foods such as kimchi. The food is disposed within a container that is slidable into the compartment. The container includes an electrical connector projecting from a container wall and which becomes plugged into a recessed electrical connector disposed in a wall of the compartment in response to insertion of the container into the compartment. The container carries a heater and a temperature sensor which are electrically connectable, via the electrical connectors, to a controller disposed in the refrigerator housing.

摘要翻译： 冰箱具有用于发酵诸如泡菜的食物的隔间。 食物设置在可滑入隔间的容器内。 容器包括从容器壁突出的电连接器，并且响应于将容器插入隔室而被插入设置在隔室的壁中的凹入的电连接器中。 容器携带加热器和温度传感器，其通过电连接器电连接到设置在冰箱壳体中的控制器。

公开(公告)号：US08486783B2

公开(公告)日：2013-07-16

申请号：US12658520

申请日：2010-02-11

申请人： Woong-hee Sohn ,  Byung-hee Kim ,  Dae-yong Kim ,  Min-sang Song ,  Gil-heyun Choi ,  Kwang-jin Moon ,  Hyun-su Kim ,  Jang-hee Lee ,  Eun-ji Jung ,  Eun-ok Lee

发明人： Woong-hee Sohn ,  Byung-hee Kim ,  Dae-yong Kim ,  Min-sang Song ,  Gil-heyun Choi ,  Kwang-jin Moon ,  Hyun-su Kim ,  Jang-hee Lee ,  Eun-ji Jung ,  Eun-ok Lee

IPC分类号： H01L21/336

CPC分类号： H01L29/7827 ,  H01L27/10876 ,  H01L29/456 ,  H01L29/66666

摘要： A method of manufacturing a semiconductor device includes: forming a trench for forming buried type wires by etching a substrate; forming first and second oxidation layers on a bottom of the trench and a wall of the trench, respectively; removing a part of the first oxidation layer and the entire second oxidation layer; and forming the buried type wires on the wall of the trench by performing a silicide process on the wall of the trench from which the second oxidation layer is removed. As a result, the buried type wires are insulated from each other.

摘要翻译： 一种制造半导体器件的方法包括：通过蚀刻衬底形成用于形成掩埋型线的沟槽; 在沟槽的底部和沟槽的壁上分别形成第一和第二氧化层; 去除一部分第一氧化层和整个第二氧化层; 以及通过在去除所述第二氧化层的所述沟槽的壁上执行硅化物处理，在所述沟槽的壁上形成所述埋入式导线。 结果，埋入式电线彼此绝缘。

公开(公告)号：US08173506B2

公开(公告)日：2012-05-08

申请号：US12626959

申请日：2009-11-30

申请人： Eun-ji Jung ,  Hyun-soo Kim ,  Byung-hee Kim ,  Dae-yong Kim ,  Woong-hee Sohn ,  Kwang-jin Moon ,  Jang-hee Lee ,  Min-sang Song ,  Eun-ok Lee

发明人： Eun-ji Jung ,  Hyun-soo Kim ,  Byung-hee Kim ,  Dae-yong Kim ,  Woong-hee Sohn ,  Kwang-jin Moon ,  Jang-hee Lee ,  Min-sang Song ,  Eun-ok Lee

IPC分类号： H01L21/336

CPC分类号： H01L21/28052 ,  H01L29/4236

摘要： A method of forming a buried gate electrode prevents voids from being formed in a silicide layer of the gate electrode. The method begins by forming a trench in a semiconductor substrate, forming a conformal gate oxide layer on the semiconductor in which the trench has been formed, forming a first gate electrode layer on the gate oxide layer, forming a silicon layer on the first gate electrode layer to fill the trench. Then, a portion of the first gate electrode layer is removed to form a recess which exposed a portion of a lateral surface of the silicon layer. A metal layer is then formed on the semiconductor substrate including on the silicon layer. Next, the semiconductor substrate is annealed while the lateral surface of the silicon layer is exposed to form a metal silicide layer on the silicon layer.

摘要翻译： 形成掩埋栅电极的方法防止在栅电极的硅化物层中形成空隙。 该方法开始于在半导体衬底中形成沟槽，在已经形成沟槽的半导体上形成共形栅极氧化层，在栅极氧化层上形成第一栅电极层，在第一栅电极上形成硅层 层填补沟槽。 然后，去除第一栅极电极层的一部分以形成暴露硅层的侧表面的一部分的凹部。 然后在包括硅层的半导体衬底上形成金属层。 接下来，半导体衬底退火，同时暴露硅层的侧表面以在硅层上形成金属硅化物层。

公开(公告)号：US20120083117A1

公开(公告)日：2012-04-05

申请号：US13238297

申请日：2011-09-21

申请人： Sang-Hoon Ahn ,  Byung-Hee Kim ,  Sang-Don Nam ,  Kyu-Hee Han ,  Gil-Heyun Choi ,  Jang-Hee Lee ,  Jong-Min Baek ,  Kyoung-Hee Kim

发明人： Sang-Hoon Ahn ,  Byung-Hee Kim ,  Sang-Don Nam ,  Kyu-Hee Han ,  Gil-Heyun Choi ,  Jang-Hee Lee ,  Jong-Min Baek ,  Kyoung-Hee Kim

IPC分类号： H01L21/314 ,  H01L21/768

CPC分类号： H01L21/7682 ,  H01L21/02126 ,  H01L21/02337 ,  H01L21/02348 ,  H01L21/3105 ,  H01L21/76829 ,  H01L2221/1047

摘要： Example embodiments relate to a method of forming a hardened porous dielectric layer. The method may include forming a dielectric layer containing porogens on a substrate, transforming the dielectric layer into a porous dielectric layer using a first UV curing process to remove the porogens from the dielectric layer, and transforming the porous dielectric layer into a crosslinked porous dielectric layer using a second UV curing process to generate crosslinks in the porous dielectric layer.

摘要翻译： 示例性实施方案涉及形成硬化多孔介电层的方法。 该方法可以包括在衬底上形成含有致孔剂的电介质层，使用第一UV固化工艺将电介质层转化为多孔介电层，以从电介质层除去致孔剂，并将多孔电介质层转化成交联的多孔介电层 使用第二UV固化方法在多孔介电层中产生交联。

公开(公告)号：US20110195446A1

公开(公告)日：2011-08-11

申请号：US13123202

申请日：2009-10-07

申请人： Jang Hee Lee ,  Soon Hwa Baek ,  Da Ham Lee ,  Da Won Lee ,  Dal Young Ji ,  Dal Young Park ,  Gowan Gook Kim

发明人： Jang Hee Lee ,  Soon Hwa Baek ,  Da Ham Lee ,  Da Won Lee ,  Dal Young Ji ,  Dal Young Park ,  Gowan Gook Kim

IPC分类号： C12Q1/02 ,  C12M1/00

CPC分类号： G01N33/52

摘要： The present invention relates to a method and a kit for diagnosis of semen quality (motility and concentration) through observation of color change visible with the naked eye in a solution combining methylene blue and sperm. The invention comprises a method for semen diagnosis using color coding (with a standard color table) charting the various colors the semen may change into, and a diagnostic it for testing semen using said method. When combined with methylene blue, healthier and more active sperm fades the original blue color more rapidly due to respiration activity by the sperm, which allows for semen quality evaluation. The above principle are adapted to kit from inside a tube which encases a methylene blue solution into which sample semen is introduced for easy evaluation.

摘要翻译： 本发明涉及通过观察在结合亚甲蓝和精子的溶液中用肉眼观察到的颜色变化来诊断精液质量（运动性和浓度）的方法和试剂盒。 本发明包括使用颜色编码（具有标准色表）的精液诊断方法，其绘制精液可能改变的各种颜色，以及使用所述方法测试精液的诊断。 当与亚甲基蓝结合使用时，由于精子的呼吸活动，更健康和更​​活跃的精子会更快地使原来的蓝色变淡，从而可以进行精液质量评估。 上述原理适用于装入样品精液的亚甲基蓝溶液的管内部，以便于评估。

公开(公告)号：US07875939B2

公开(公告)日：2011-01-25

申请号：US12453198

申请日：2009-05-01

申请人： Hee-Sook Park ,  Gil-Heyun Choi ,  Chang-Won Lee ,  Byung-Hak Lee ,  Sun-Pil Youn ,  Dong-Chan Lim ,  Jae-Hwa Park ,  Jang-Hee Lee ,  Woong-Hee Sohn

发明人： Hee-Sook Park ,  Gil-Heyun Choi ,  Chang-Won Lee ,  Byung-Hak Lee ,  Sun-Pil Youn ,  Dong-Chan Lim ,  Jae-Hwa Park ,  Jang-Hee Lee ,  Woong-Hee Sohn

IPC分类号： H01L23/532

CPC分类号： H01L29/4933 ,  C23C16/42 ,  H01L21/28061 ,  H01L21/28194 ,  H01L21/28556 ,  H01L21/76846 ,  H01L29/517

摘要： In an ohmic layer and methods of forming the ohmic layer, a gate structure including the ohmic layer and a metal wiring having the ohmic layer, the ohmic layer is formed using tungsten silicide that includes tungsten and silicon with an atomic ratio within a range of about 1:5 to about 1:15. The tungsten silicide may be obtained in a chamber using a reaction gas including a tungsten source gas and a silicon source gas by a partial pressure ratio within a range of about 1.0:25.0 to about 1.0:160.0. The reaction gas may have a partial pressure within a range of about 2.05 percent to about 30.0 percent of a total internal pressure of the chamber. When the ohmic layer is employed for a conductive structure, such as a gate structure or a metal wiring, the conductive structure may have a reduced resistance.

摘要翻译： 在欧姆层和形成欧姆层的方法中，包括欧姆层的栅极结构和具有欧姆层的金属布线，欧姆层使用包含钨和硅的硅化钨形成，原子比在约 1:5至约1:15。 可以在室内使用包含钨源气体和硅源气体的反应气体，在约1.0:25.0至约1.0:16.0.0的范围内的分压比获得硅化钨。 反应气体可以具有在室的总内部压力的约2.05％至约30.0％的范围内的分压。 当欧姆层用于诸如栅极结构或金属布线的导电结构时，导电结构可以具有降低的电阻。