-
公开(公告)号:US20180335876A1
公开(公告)日:2018-11-22
申请号:US15326580
申请日:2016-12-29
Inventor: Chunqian Zhang , Chao Wang , Gui Chen
IPC: G06F3/041 , G02F1/1333 , G02F1/1335 , G02F1/1337 , G02F1/1339
CPC classification number: G06F3/0412 , G02F1/13338 , G02F1/133512 , G02F1/1337 , G02F1/13394 , G02F2001/13398
Abstract: The technical field of liquid crystal display panels is related to, and an in-cell touch panel is provided. The in-cell touch panel includes a first substrate, a conductive line, an alignment film, a spacer, and a second substrate sequentially from bottom to top, and further includes a black matrix covering the conductive line. Without changing a total contact area between a first contact surface of the spacer and the conductive line, the spacer can be arranged to completely stand on the conductive line by changing a shape of the first contact surface. When the panel is made thinner or is pressed, contact and friction between the spacer and the alignment film around the conductive line can be avoided, and large-area non-uniform liquid crystal alignment can be avoided. An area of the black matrix arranged around the spacer can be greatly reduced, and accordingly an aperture ratio of pixels can be improved.
-
公开(公告)号:US20180301107A1
公开(公告)日:2018-10-18
申请号:US15021461
申请日:2016-02-26
IPC: G09G3/36 , H03K17/687
CPC classification number: G09G3/3696 , G02F1/13 , G09G3/36 , G09G3/3677 , G09G2300/0866 , G09G2310/0289 , G09G2320/0214 , H03K17/6871
Abstract: A GOA circuit includes GOA circuit units. Each GOA circuit has a holding module A first transistor and a second transistor in the holding module holds the voltage imposed on the first control node to be at high voltage level. Also, the transistors form a direct current passage between the first control node and a first fixed voltage at high voltage level so the voltage imposed on the first control node is not lowered due to electricity leakage. The GOA circuit unit can resolve the problem of easy leakage of electricity. When the scanning signals are output by the GOA circuit unit, the stability is highly ensured.
-
公开(公告)号:US09857653B2
公开(公告)日:2018-01-02
申请号:US14908101
申请日:2015-11-23
Applicant: Shenzhen China Star Optoelectronics Technology Co., Ltd. , WUHAN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD
Inventor: Gui Chen , Caiqin Chen
IPC: G02F1/1362 , G06F3/041 , G02F1/1333 , G02F1/1368 , G02F1/136 , H01L27/12
CPC classification number: G02F1/136286 , G02F1/1333 , G02F1/13338 , G02F1/1368 , G02F2001/13606 , G02F2201/121 , G06F3/041 , G06F3/0412 , G06F3/044 , H01L27/124
Abstract: The present invention provides a thin film transistor array substrate and a liquid crystal display panel. The thin film transistor array substrate comprises: a substrate, and the substrate comprises a first surface and a second surface oppositely located; a thin film transistor array, located on the first surface; a common electrode layer, and the common electrode layer is isolated from the thin film transistor array, and the common electrode layer comprises a plurality of first strip holes; a sensing electrode layer, and the sensing electrode layer is isolated from the common electrode layer, and the sensing electrode layer comprises a plurality of sensing units and a plurality of sensing wires, and the sensing units are distributed in row and column, and the sensing wires are electrically coupled to the sensing units of each row or each column respectively, and the sensing wires are located corresponding to the first strip holes.
-
公开(公告)号:US09722094B2
公开(公告)日:2017-08-01
申请号:US14783802
申请日:2015-09-09
Applicant: Shenzhen China Star Optoelectronics Technology Co., Ltd. , Wuhan China Star Optoelectronics Technology Co., Ltd.
IPC: H01L29/786 , H01L29/423 , H01L29/66
CPC classification number: H01L29/78696 , H01L29/42384 , H01L29/66757 , H01L29/78621 , H01L29/78645 , H01L29/78675
Abstract: The present invention proposes a TFT, an array substrate, and a method of forming a TFT. The TFT includes a substrate, a buffer layer, a patterned poly-si layer, an isolation layer, a gate layer, and a source/drain pattern layer. The poly-si layer includes a heavily doped source and a heavily doped drain, and a channel. The gate layer includes a first gate area and a second gate area. The source/drain pattern layer includes a source pattern, a drain pattern and a bridge pattern, with the source pattern electrically connecting the heavily doped source, the drain pattern electrically connecting the heavily doped drain, and one end of the bridge pattern connecting the first gate area and the second gate area. The driving ability of the present inventive TFT is enhanced without affecting the leakage current.
-
-
-