Abstract:
A semiconductor device includes a first fin type pattern on a substrate, a second fin type pattern, parallel to the first fin type pattern, on the substrate, and an epitaxial pattern on the first and second fin type patterns. The epitaxial pattern may include a shared semiconductor pattern on the first fin type pattern and the second fin type pattern. The shared semiconductor pattern may include a first sidewall adjacent to the first fin type pattern and a second sidewall adjacent to the second fin type pattern. The first sidewall may include a first lower facet, a first upper facet on the first lower facet and a first connecting curved surface connecting the first lower and upper facets. The second sidewall may include a second lower facet, a second upper facet on the second lower facet and a second connecting curved surface connecting the second lower and upper facets.
Abstract:
A graphics processing unit (GPU) includes a subdivider connected between a vertex shader and a domain shader. The subdivider receives first points of a first patch from the vertex shader, computes and assigns a tessellation factor for the first patch, generates second patches by refining the first patch using the first points and the tessellation factor, determines whether each of the second patches satisfies a tessellation criterion, and feeds back a patch that does not satisfy the tessellation criterion among the second patches to an input of the subdivider as a first feedback patch.