公开(公告)号：US09026791B2

公开(公告)日：2015-05-05

申请号：US13793710

申请日：2013-03-11

Applicant: QUALCOMM Incorporated

Inventor： Roberto Avanzi ,  Billy B. Brumley

IPC: H04W12/06 ,  G06F7/58 ,  H04L9/06

CPC classification number: H04W12/06 ,  G06F7/584 ,  H04L9/0668 ,  H04L2209/122

Abstract: A wireless communication device is described. The wireless communication device includes a linear feedback shift register. The linear feedback shift register is initialized. The linear feedback shift register is a word based odd characteristic linear feedback shift register. The linear feedback shift register includes multiple 64-bit registers. A feedback function output is generated using the 64-bit registers. The feedback function output is placed into a highest register of the linear feedback shift register.

Abstract translation: 描述无线通信设备。 无线通信装置包括线性反馈移位寄存器。 线性反馈移位寄存器被初始化。 线性反馈移位寄存器是一个基于字的奇特征线性反馈移位寄存器。 线性反馈移位寄存器包括多个64位寄存器。 使用64位寄存器生成反馈功能输出。 反馈功能输出置于线性反馈移位寄存器的最高寄存器中。

公开(公告)号：US12164441B2

公开(公告)日：2024-12-10

申请号：US18456683

申请日：2023-08-28

Applicant: QUALCOMM Incorporated

Inventor： Darren Lasko ,  Roberto Avanzi ,  Thomas Philip Speier ,  Harb Abdulhamid ,  Vikramjit Sethi

IPC: G06F12/14 ,  G06F21/72 ,  H04L9/06 ,  H04L9/14

Abstract: A method, apparatus, and system for storing memory encryption realm key IDs is disclosed. A method comprises accessing a memory ownership table with a physical address to determine a realm ID associated with the physical address, accessing a key ID association structure with the realm ID to determine a realm key IS associated with the realm ID, and initiating a memory transaction based on the realm key ID. Once retrieved, the realm key ID may be stored in a translation lookaside buffer.

公开(公告)号：US11216592B2

公开(公告)日：2022-01-04

申请号：US16053626

申请日：2018-08-02

Applicant: QUALCOMM Incorporated

Inventor： Roberto Avanzi ,  Darren Lasko

IPC: G06F21/00 ,  H04L29/06 ,  G06F21/72 ,  G06F12/14 ,  H04L9/06 ,  H04L9/08

Abstract: Some embodiments include systems and methods for the management of a plurality of expanded cryptographic keys associated with a plurality of corresponding Protected Software Environments (PSEs) supervised by PSE-management software running on a computer system. In one embodiment, a computer system has a first processor, a first memory controller, and a first RAM. The first memory controller has a first memory cryptography circuit connected between the first processor and the first RAM. The memory cryptography circuit comprises a keystore and a first cryptographic engine. The keystore comprises a seedstore and a key-expansion engine. The seedstore is configured to store a first plurality of cryptographic key seeds accessible by a key identifier, for use by the key-expansion engine to generate expanded keys, where each key seed corresponds to a corresponding client.

公开(公告)号：US10027640B2

公开(公告)日：2018-07-17

申请号：US14862059

申请日：2015-09-22

Applicant: QUALCOMM Incorporated

Inventor： Roberto Avanzi ,  Rosario Cammarota ,  Ron Keidar

IPC: H04L29/06 ,  H04L9/08 ,  H04W12/02 ,  H04W4/70

Abstract: A method includes: decrypting, in a device, a first subset of encrypted data using a cryptographic device key associated with the device to produce first plain text, where a set of encrypted data comprises the first subset of encrypted data and a second subset of encrypted data, and where the first subset of encrypted data and the second subset of encrypted data each contain less encrypted data than the set of encrypted data and are different from each other; decrypting, in the device, the second subset of encrypted data using the cryptographic device key to produce second plain text; encrypting, in the device, the first plain text using a first ephemeral key to produce first re-encrypted data; and encrypting, in the device, the second plain text using a second ephemeral key to produce second re-encrypted data, the second ephemeral key being different from the first ephemeral key.

公开(公告)号：US09094191B2

公开(公告)日：2015-07-28

申请号：US13830598

申请日：2013-03-14

Applicant: QUALCOMM Incorporated

Inventor： Roberto Avanzi ,  Boris Dolgunov ,  Gregory Gordon Rose

IPC: H04L9/18 ,  H04L9/08

CPC classification number: H04L9/0825 ,  H04L9/0822 ,  H04L2209/60 ,  H04L2209/76

Abstract: A method operational on a receiver device for exchanging and/or generating security keys is provided. A first encrypted master key Km is received at the receiver device from a transmitter device, the first encrypted master key Km secured by a receiver public key Kpub-rx. The first encrypted master key Km may be decrypted with a receiver private key Kpri-rx to obtain the master key Km. The master key Km may be encrypted using a block cipher that applies a receiver secret key Kh to obtain a second encrypted master key.

Abstract translation: 提供了一种在用于交换和/或生成安全密钥的接收机设备上操作的方法。 第一加密主密钥Km在接收机设备处从发射机设备接收，第一加密主密钥Km由接收方公钥Kpub-rx确保。 第一加密主密钥Km可以用接收方私钥Kpri-rx解密，以获得主密钥Km。 可以使用应用接收机秘密密钥Kh的块密码来加密主密钥Km，以获得第二加密主密钥。

公开(公告)号：US20190215160A1

公开(公告)日：2019-07-11

申请号：US15865994

申请日：2018-01-09

Applicant: QUALCOMM Incorporated

Inventor： Darren LASKO ,  Roberto Avanzi ,  Thomas Speier ,  Harb Abdulhamid ,  Vikramjit Sethi

IPC: H04L9/08 ,  G06F21/60 ,  G06F21/72

CPC classification number: H04L9/0894 ,  G06F21/602 ,  G06F21/71 ,  G06F21/72 ,  G06F21/79 ,  G06F21/85 ,  G06F2009/45587

Abstract: Embodiments of the disclosure include systems and methods for storage of a first plurality of cryptographic keys associated with a first plurality of corresponding Protected Software Environments (PSEs) supervised by a PSE-management software running on a computer system and configured to supervise a superset of the plurality of PSEs. The computer system stores currently unused keys of the superset in a relatively cheap, large, and slow memory and caches the keys of the first plurality in a relatively fast, small, and expensive memory. In one embodiment, in a computer system having a first processor, a first memory controller, and a first RAM, the first memory controller has a memory cryptography circuit connected between the first processor and the first RAM, the memory cryptography circuit has a keystore and a first cryptographic engine, and the keystore is configured to store a first plurality of cryptographic keys accessible by a cryptographic-key identification.

公开(公告)号：US10235303B2

公开(公告)日：2019-03-19

申请号：US15232723

申请日：2016-08-09

Applicant: QUALCOMM Incorporated

Inventor： David Hartley ,  Roberto Avanzi ,  Rosario Cammarota

IPC: G06F12/14 ,  G06F21/12 ,  G06F21/62 ,  H04L29/06 ,  G06F21/14 ,  G06F21/74

Abstract: Techniques for protecting software in a computing device are provided. A method according to these techniques includes receiving a request from a non-secure software module to execute an instruction of a secure software module comprising encrypted program code, determining whether the instruction comprises an instruction associated with a controlled point of entry to the secure software module accessible outside of the secure software module, executing one or more instructions of the secure software module responsive to the instruction comprising an instruction associated with the controlled point of entry to the secure software module, and controlling exit from the secure software module to return execution to the non-secure software module.

公开(公告)号：US10223289B2

公开(公告)日：2019-03-05

申请号：US15070947

申请日：2016-03-15

Applicant: QUALCOMM Incorporated

Inventor： Roberto Avanzi ,  David Hartley ,  Rosario Cammarota

IPC: G06F21/00 ,  G06F12/14 ,  G06F12/0802 ,  G06F21/14 ,  G06F21/79 ,  G06F21/60

Abstract: In an aspect, a cache memory device receives a request to read an instruction or data associated with a memory device. The request includes a first realm identifier and a realm indicator bit, where the first realm identifier enables identification of a realm that includes one or more selected regions in the memory device. The cache memory device determines whether the first realm identifier matches a second realm identifier in a cache tag when the instruction or data is stored in the cache memory device, where the instruction or data stored in the cache memory device has been decrypted based on an ephemeral encryption key associated with the second realm identifier when the first realm identifier indicates the realm and when the realm indicator bit is enabled. The cache memory device transmits the instruction or data when the first realm identifier matches the second realm identifier.

公开(公告)号：US10142303B2

公开(公告)日：2018-11-27

申请号：US15053892

申请日：2016-02-25

Applicant: QUALCOMM Incorporated

Inventor： Roberto Avanzi ,  David Hartley ,  Rosario Cammarota

IPC: H04L29/06 ,  G06F12/14 ,  G06F21/62 ,  G06F21/78 ,  G06F11/07 ,  G06F11/16 ,  G06F11/30

Abstract: In an aspect, a method for protecting software includes obtaining a payload including at least one of instructions or data, establishing a realm in a memory device, encrypting the payload based on an ephemeral encryption key (EEK) associated with the realm, and storing the encrypted payload in the realm of the memory device. In another aspect, a method for protecting software includes receiving a memory transaction associated with the memory device, the memory transaction including at least a realm identifier (RID) and a realm indicator bit, obtaining the EEK associated with the RID when the RID indicates the realm and when the realm indicator bit is enabled, decrypting an instruction and/or data retrieved from the realm based on the EEK when the memory transaction is a read transaction, and encrypting second data for storage in the realm based on the EEK when the memory transaction is a write transaction.

公开(公告)号：US09712319B2

公开(公告)日：2017-07-18

申请号：US15013684

申请日：2016-02-02

Applicant: QUALCOMM Incorporated

Inventor： Roberto Avanzi

IPC: H04L29/06 ,  H04L9/06

CPC classification number: H04L9/0618 ,  H04L2209/08 ,  H04L2209/34

Abstract: Disclosed is an apparatus and method for encrypting plaintext data. The method includes: receiving at least one plaintext data input; applying a Nonce through a function to the at least one plaintext data input to create Nonced plaintext data outputs and/or to intermediate values of a portion of an encryption function applied to the at least one plaintext data input to create intermediate Nonced data outputs; and applying the encryption function to at least one of the Nonced plaintext data outputs and/or the intermediate Nonced data outputs to create encrypted output data. The encrypted output data is then transmitted to memory.