公开(公告)号：US20170257315A1

公开(公告)日：2017-09-07

申请号：US15414277

申请日：2017-01-24

Applicant: Oracle International Corporation

Inventor： BJØRN DAG JOHNSEN ,  BARTOSZ BOGDANSKI ,  LINE HOLEN ,  PRABHUNANDAN NARASIMHAMURTHY ,  ANKITA BHANDARY

IPC: H04L12/741 ,  H04L12/713 ,  H04L12/937 ,  H04L29/06

CPC classification number: H04L45/586 ,  H04L45/02 ,  H04L45/04 ,  H04L45/48 ,  H04L45/74 ,  H04L47/36 ,  H04L49/15 ,  H04L49/201 ,  H04L49/253 ,  H04L49/30 ,  H04L49/358 ,  H04L49/70 ,  H04L67/10 ,  H04L69/22

Abstract: Systems and methods for supporting SMA level abstractions at router ports for enablement of data traffic in a high performance computing environment. In accordance with an embodiment, a subnet manager in a local subnet is responsible for enabling data traffic between subnets in a high performance computing environment. The SM can configure and set a data attribute at a switch port configured as a router port such that incoming data packets can be checked against the attribute to determine whether the data packet's destination is allowed or disallowed to receive inter-subnet data traffic.

公开(公告)号：US20170214654A1

公开(公告)日：2017-07-27

申请号：US15414253

申请日：2017-01-24

Applicant: Oracle International Corporation

Inventor： BJØRN DAG JOHNSEN ,  BARTOSZ BOGDANSKI ,  LINE HOLEN ,  PRABHUNANDAN NARASIMHAMURTHY

IPC: H04L29/12 ,  H04L12/741 ,  H04L12/24

CPC classification number: H04L45/74 ,  G06F9/45558 ,  G06F2009/4557 ,  G06F2009/45595 ,  H04L12/18 ,  H04L12/185 ,  H04L12/1886 ,  H04L12/4641 ,  H04L41/046 ,  H04L41/082 ,  H04L41/12 ,  H04L45/02 ,  H04L45/16 ,  H04L45/20 ,  H04L45/26 ,  H04L45/48 ,  H04L45/586 ,  H04L45/745 ,  H04L47/23 ,  H04L49/00 ,  H04L49/15 ,  H04L49/253 ,  H04L49/354 ,  H04L49/358 ,  H04L49/70 ,  H04L61/10 ,  H04L61/2514 ,  H04L61/35 ,  H04L61/6004 ,  H04L61/6059 ,  H04L61/6068 ,  H04L63/02 ,  H04L63/06 ,  H04L67/10 ,  H04L69/22

Abstract: Systems and methods for supporting SMA level abstractions at router ports for GRH to LRH mapping tables in a high performance computing environment. Ingress port mapping of GRH to new LRH can be reduced to minimally include DGID to DLID mapping. By further reducing the complexity by assuming all packets received at a subnet are addressed to a correct subnet (and also taking into account that correct subnet destination can be checked independently of the individual mapping entries), the DGID address can be simplified to a DGUID address, allowing for additional mappings within a same memory size.

公开(公告)号：US20170214639A1

公开(公告)日：2017-07-27

申请号：US15416917

申请日：2017-01-26

Applicant: Oracle International Corporation

Inventor： BJØRN DAG JOHNSEN ,  BARTOSZ BOGDAÑSKI ,  LINE HOLEN

IPC: H04L12/931 ,  H04L12/46 ,  H04L12/741 ,  H04L12/713

CPC classification number: H04L45/74 ,  G06F9/45558 ,  G06F2009/4557 ,  G06F2009/45595 ,  H04L12/18 ,  H04L12/185 ,  H04L12/1886 ,  H04L12/4641 ,  H04L41/046 ,  H04L41/082 ,  H04L41/12 ,  H04L45/02 ,  H04L45/16 ,  H04L45/20 ,  H04L45/26 ,  H04L45/48 ,  H04L45/586 ,  H04L45/745 ,  H04L47/23 ,  H04L49/00 ,  H04L49/15 ,  H04L49/253 ,  H04L49/354 ,  H04L49/358 ,  H04L49/70 ,  H04L61/10 ,  H04L61/2514 ,  H04L61/35 ,  H04L61/6004 ,  H04L61/6059 ,  H04L61/6068 ,  H04L63/02 ,  H04L63/06 ,  H04L67/10 ,  H04L69/22

Abstract: Systems and methods for supporting multiple LIDs for dual-port virtual routers in a high performance computing environment. In accordance with an embodiment, a dual port router abstraction can provide a simple way for enabling subnet-to-subnet router functionality to be defined based on a switch hardware implementation. A virtual dual-port router can logically be connected outside a corresponding switch port. This virtual dual-port router can provide an InfiniBand specification compliant view to a standard management entity, such as a Subnet Manager. In order to allow for packets addressed outside of a local subnet and for those packets addressed to a switch port configured as a router port within a local subnet, the subnet manager can configure the switch port configured as a router port with two or more local identifiers.

公开(公告)号：US20170212918A1

公开(公告)日：2017-07-27

申请号：US15415497

申请日：2017-01-25

Applicant: Oracle International Corporation

Inventor： BJØRN DAG JOHNSEN ,  PRABHUNANDAN NARASIMHAMURTHY ,  LINE HOLEN

IPC: G06F17/30 ,  H04L29/08

CPC classification number: H04L49/25 ,  G06F9/451 ,  G06F9/45558 ,  G06F16/2237 ,  G06F2009/45579 ,  G06F2009/45595 ,  H04L12/44 ,  H04L41/046 ,  H04L41/0803 ,  H04L41/12 ,  H04L41/14 ,  H04L43/0823 ,  H04L43/0882 ,  H04L45/02 ,  H04L45/48 ,  H04L49/10 ,  H04L49/15 ,  H04L49/30 ,  H04L49/358 ,  H04L49/70 ,  H04L63/20 ,  H04L67/10 ,  H04L67/1097

Abstract: System and method for supporting configurable legacy P_Key table abstraction using a bitmap based hardware implementation in a high performance computing environment. A mapping table in DRAM can be provided through the use of a software based SMA that implements the mapping table. With this mapping table, it is possible to provide a legacy compliant view of a bit map based P_Key table. Such a legacy compliant view can be called a virtual P_Key table, or a configurable legacy P_Key table abstraction.