公开(公告)号：US20130103875A1

公开(公告)日：2013-04-25

申请号：US13707209

申请日：2012-12-06

Applicant: Huawei Technologies Co., Ltd.

Inventor： Sheng Chang ,  Rongyu Yang ,  Xinyu Hou

IPC: G06F13/40

CPC classification number: G06F13/40 ,  G06F13/4059 ,  G06F13/4265 ,  G06F13/4282 ,  G06F15/17 ,  G06F2213/0038 ,  G06F2213/3852

Abstract: The present disclosure provides a CPU interconnect device, the CPU interconnect device connects with a first CPU, which includes a quick path interconnect QPI interface and a serial deserial SerDes interface, the quick path interconnect QPI interface receives serial QPI data sent from a CPU, converts the received serial QPI data into a parallel QPI data, and outputs the parallel QPI data to the serial deserial SerDes interface; the serial deserial SerDes interface converts the parallel QPI data output by the QPI interface into a high-speed serial SerDes data and then send the high-speed serial SerDes data to another CPU interconnect device connected with another CPU. The defects of poor scalability, long data transmission delay, and a high cost of an existing interconnect system among CPUs can be solved.

Abstract translation: 本公开提供了一种CPU互连设备，CPU互连设备与包括快速路径互连QPI接口和串行解串联SerDes接口的第一CPU连接，快速路径互连QPI接口接收从CPU发送的串行QPI数据，转换 将接收到的串行QPI数据转换为并行QPI数据，并将并行QPI数据输出到串联解耦SerDes接口; 串行串行SerDes接口将QPI接口输出的并行QPI数据转换为高速串行SerDes数据，然后将高速串行SerDes数据发送到与另一个CPU连接的另一个CPU互连设备。 可以解决CPU之间的可扩展性差，长数据传输延迟以及现有互连系统成本高的缺陷。