公开(公告)号：US20150200678A1

公开(公告)日：2015-07-16

申请号：US14308752

申请日：2014-06-19

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor： Young Kyun CHO ,  JAE HO JUNG ,  Kwangchun LEE

IPC: H03M1/00 ,  H03M3/00

CPC classification number: H03M3/448 ,  H03M1/00 ,  H03M1/12 ,  H03M3/30

Abstract: Provided is a delta-sigma modulator including a summer summing an input signal and an analog signal, a first integrator integrating an output signal from the summer and outputting a first integration signal, a second integrator integrating the first integration signal and outputting a second integration signal, a comparator comparing the second integration signal and a reference signal and outputting a digital signal according to the comparison result, and a digital-to-analog converter converting the digital signal into an analog signal in response to a clock signal and outputting the converted analog signal, wherein the second integrator operates based on an Nth order (where N is natural number of 1 or greater) transfer function.

Abstract translation: 提供了一种Δ-Σ调制器，其包括对输入信号和模拟信号进行加法求和，第一积分器，对来自加法器的输出信号进行积分并输出第一积分信号;第二积分器，积分第一积分信号并输出​​第二积分信号 比较比较第二积分信号和参考信号的比较器，并根据比较结果输出数字信号;以及数模转换器，响应于时钟信号将数字信号转换为模拟信号，并输出转换的模拟 信号，其中所述第二积分器基于N阶（其中N是1或更大的自然数）传递函数来操作。

公开(公告)号：US20150078500A1

公开(公告)日：2015-03-19

申请号：US14294836

申请日：2014-06-03

Applicant: Electronics and Telecommunications Research Institute

Inventor： Sung Jun LEE ,  Young Kyun CHO ,  Seunghyun JANG ,  Bong Hyuk PARK ,  JAE HO JUNG ,  Kwangchun LEE

IPC: H04L7/00

CPC classification number: H04L7/0016 ,  H04L27/366 ,  H04L27/02 ,  H04L27/361

Abstract: Provided is a method of correcting a time misalignment between envelope and phase components in a transmitting apparatus which separates envelope and phase components of a signal, processes them, and then recombines them to transmit the recombined signal. For this, in a method of correcting a time misalignment between envelope and phase components according to an embodiment of the present invention, a time misalignment is corrected by applying a time delay to at least one of envelope and phase components in digital and analog signal processing operations, or applying a time delay to an envelope or phase component by a pre-processing operation.

Abstract translation: 提供了一种校正发送装置中的包络和相位分量之间的时间偏移的方法，该发送装置分离信号的包络和相位分量，处理它们，然后将它们复合以发送重组信号。 为此，在根据本发明的实施例的校正包络和相位分量之间的时间失准的方法中，通过对数字和模拟信号处理中的包络和相位分量中的至少一个应用时间延迟来校正时间偏移 操作或通过预处理操作对信封或相位分量施加时间延迟。

公开(公告)号：US20140159700A1

公开(公告)日：2014-06-12

申请号：US14098989

申请日：2013-12-06

Applicant: Electronics and Telecommunications Research Institute

Inventor： Young Kyun CHO ,  Jae Ho JUNG ,  Kwang Chun LEE

IPC: G05F3/16

CPC classification number: G05F3/16 ,  G05F3/30

Abstract: Disclosed is a bandgap reference voltage generator insensitive to changes of process, voltage, and temperature. A bandgap reference voltage generator may detect current having characteristic of CTAT and current having characteristic of PTAT which flow in a current compensation part included in an amplification part, and provide body voltage to one of two input transistors included in the amplification part in response to ratio of the two currents when the ratio is different from the preconfigured reference value. Thus, characteristics according to changes of parameters of elements and change of offset of the amplification part due to changes of PVT may be enhanced, and a characteristic of power supply rejection ratio (PSRR) may be enhanced.

Abstract translation: 公开了对工艺，电压和温度变化不敏感的带隙基准电压发生器。 带隙参考电压发生器可以检测具有CTAT特性的电流和具有在包括在放大部分中的电流补偿部分中流动的PTAT特性的电流，并且响应于比率而向包括在放大部分中的两个输入晶体管之一提供体电压 当该比率与预配置的参考值不同时，两个电流。 因此，可以增加由元件参数的变化引起的特性和由于PVT变化引起的放大部分偏移的变化，并且可以提高电源抑制比（PSRR）的特性。