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公开(公告)号:US11222234B2
公开(公告)日:2022-01-11
申请号:US16486025
申请日:2019-04-02
Applicant: BOE Technology Group Co., Ltd.
Inventor: Tingting Wang
IPC: G06K9/00 , G06K9/62 , G06K9/32 , G06T7/136 , G06T5/00 , G06N3/04 , G06N3/08 , G01N23/04 , G01N23/18 , G06T7/00
Abstract: The present application discloses a method of training a convolutional neural network for defect inspection. The method includes collecting a training sample set including multiple solder joint images. A respective one of the multiple solder joint images includes at least one solder joint having one of different types of solder joint defects. The at least one solder joint is located substantially in a pre-defined region of interest (ROI) in a center of the image. The method further includes inputting the training sample set to a convolutional neural network to obtain target feature vectors respectively associated with the multiple solder joint images. Additionally, the method includes adjusting network parameters characterizing the convolutional neural network through a training loss function based on the target feature vectors and pre-labeled defect labels corresponding to different types of solder joint defects. The training loss function includes at least two different loss functions.
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公开(公告)号:US20210357066A1
公开(公告)日:2021-11-18
申请号:US16605197
申请日:2019-04-30
Inventor: Qi Wang , Tingting Wang , Bo Zhou , Yongzhi Song
Abstract: Provided are a touch control structure, a touch control method and a touch control device. The touch control structure includes: a touch control layer; an electrode layer disposed on the touch control layer; and a dielectric material layer disposed on a side of the electrode layer away from the touch control layer, wherein the dielectric material layer has a lipophilicity variable with a voltage applied by the electrode layer.
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23.
公开(公告)号:US12190782B2
公开(公告)日:2025-01-07
申请号:US18496888
申请日:2023-10-29
Inventor: Tingting Wang , Qi Wang , Yan Yan
IPC: G09G3/32 , G09G3/20 , G11C19/28 , G02F1/1362 , H01L27/12 , H01L29/417
Abstract: The present disclosure provides a shift register, a gate driving circuit and a display panel. The shift register includes a transistor, which includes a gate electrode, a gate insulating layer, an active layer, a first electrode and a second electrode; the first and second electrode are of comb-shaped structures; the first electrode includes first and second comb tooth portions arranged at intervals, and a first comb handle portion connecting the first and second comb tooth portions; and comb tooth electrodes of the first comb tooth portions have a different length from those of the second comb tooth portions; the second electrode includes third and fourth comb tooth portions arranged at intervals, and a second comb handle portion connecting the third and fourth comb tooth portions; the first and third comb tooth portions form an inter-digital structure, the second and fourth comb tooth portions form an inter-digital structure.
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公开(公告)号:US11876102B2
公开(公告)日:2024-01-16
申请号:US18098773
申请日:2023-01-19
Inventor: Xue Wang , Xiao Wang , Yan Yan , Tingting Wang , Yaya Qi , Xiaoying Li , Zhiqiang Ma
IPC: G02F1/1343 , G02F1/1362 , H01L27/12
CPC classification number: H01L27/124 , G02F1/13629 , G02F1/134309 , G02F1/134318 , G02F1/136286 , H01L27/1248
Abstract: The present disclosure provides a display substrate, a display panel and a display apparatus, belonging to the field of display technology. The display substrate includes a base, a plurality of common electrodes and a plurality of common electrode lines, the common electrodes are distributed on the base in an array, the common electrode lines extend along a row direction, and each common electrode line is connected to a corresponding row of common electrodes. The common electrode line is connected to the common electrode through a conductive connection portion, and the conductive connection portion includes conductive structures stacked on top of one another in a plurality of layers. The display substrate can reduce the resistance between the common electrode and the common electrode line, thereby reducing the voltage difference between the common electrodes in the display substrate and improving the uniformity of the common voltage therein.
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公开(公告)号:US11805630B2
公开(公告)日:2023-10-31
申请号:US17433164
申请日:2021-02-07
Inventor: Yaya Qi , Dianzheng Dong , Yan Yan , Xiao Wang , Xue Wang , Tingting Wang , Xiaoying Li , Zhiqiang Ma
CPC classification number: H05K9/0067 , H05F3/00 , H05K9/0064 , G02F2202/22
Abstract: The present disclosure provides a display substrate, including: a display area and a bonding area positioned on a side of the display area, the bonding area includes a plurality of bonding sub-areas arranged at intervals, the bonding sub-areas are arranged along a direction in which an edge of the display area extends and configured for bonding a chip-on-film, where a first antistatic layer is further arranged on the bonding area, at least a part of the first antistatic layer is positioned between adjacent ones of the bonding sub-areas, and the first antistatic layer is electrically coupled to a reference signal terminal. The present disclosure further provides a display device.
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公开(公告)号:US11586088B2
公开(公告)日:2023-02-21
申请号:US17599024
申请日:2021-02-26
Inventor: Xue Wang , Xiao Wang , Yan Yan , Tingting Wang , Yaya Qi , Xiaoying Li , Zhiqiang Ma
IPC: G02F1/1362 , G02F1/1368 , G02F1/1333 , G02F1/1343
Abstract: The present disclosure provides a display substrate, a display panel and a display apparatus, belonging to the field of display technology. The display substrate includes a base, a plurality of common electrodes and a plurality of common electrode lines, the common electrodes are distributed on the base in an array, the common electrode lines extend along a row direction, and each common electrode line is connected to a corresponding row of common electrodes. The common electrode line is connected to the common electrode through a conductive connection portion, and the conductive connection portion includes conductive structures stacked on top of one another in a plurality of layers. The display substrate can reduce the resistance between the common electrode and the common electrode line, thereby reducing the voltage difference between the common electrodes in the display substrate and improving the uniformity of the common voltage therein.
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公开(公告)号:US20210334587A1
公开(公告)日:2021-10-28
申请号:US16486025
申请日:2019-04-02
Applicant: BOE Technology Group Co., Ltd.
Inventor: Tingting Wang
IPC: G06K9/62 , G06T7/00 , G06K9/32 , G06T7/136 , G06T5/00 , G06N3/04 , G06N3/08 , G01N23/04 , G01N23/18
Abstract: The present application discloses a method of training a convolutional neural network for defect inspection. The method includes collecting a training sample set including multiple solder joint images. A respective one of the multiple solder joint images includes at least one solder joint having one of different types of solder joint defects. The at least one solder joint is located substantially in a pre-defined region of interest (ROI) in a center of the image. The method further includes inputting the training sample set to a convolutional neural network to obtain target feature vectors respectively associated with the multiple solder joint images. Additionally, the method includes adjusting network parameters characterizing the convolutional neural network through a training loss function based on the target feature vectors and pre-labeled defect labels corresponding to different types of solder joint defects. The training loss function includes at least two different loss functions.
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28.
公开(公告)号:US11100369B2
公开(公告)日:2021-08-24
申请号:US16509774
申请日:2019-07-12
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Yue Li , Tingting Wang , Guangwei Huang
Abstract: The present disclosure provides a training method for a tag identification network, a tag identification apparatus/method and device. The training method for a tag identification network includes: acquiring a first number of first images, each of the first images having its standard tag; adjusting parameters of the tag identification network by utilizing the first number of first images and their standard tags; selecting a second number of first images from the first number of first images as images to be converted, the second number being smaller than the first number; performing a style conversion process on each of images to be converted to generate a second image corresponding thereto, and serving a standard tag of the image to be converted as a standard tag of the second image; and adjusting the parameters of the tag identification network by utilizing the second number of the second images and their standard tags.
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公开(公告)号:US20210151468A1
公开(公告)日:2021-05-20
申请号:US16826624
申请日:2020-03-23
Inventor: Xiaoying LI , Yan Yan , Xue Wang , Tingting Wang , Yaya Qi , Xiao Wang , Zhiqiang Ma
IPC: H01L27/12 , H01L23/538
Abstract: The present disclosure discloses an array substrate, a display panel and a display device. The array substrate comprises: a substrate, multiple signal lines arranged on a side of the substrate and extending along a first direction, and multiple lead terminals connected with the multiple signal lines respectively; wherein the multiple lead terminals each comprises: a bonding area configured to be bonded with a flexible printed circuit board, and a bending area located at a side of the bonding area facing away from a connected signal line, wherein the lead terminal is bent-shaped in the bending area.
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