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21.发明申请公开(公告)号：US20170307912A1
公开(公告)日：2017-10-26
申请号：US15517660
申请日：2015-10-15
Inventor： Xu Shi , Zhilong Xu , Jun Liu , Xiaojun Wang , Dongqing Li , Shutong Huang , Wei Chen , Lei Zhang
IPC: G02F1/13 , B65G47/91 , H01L21/683 , H01L21/677
CPC classification number: G02F1/13 , B65G47/91 , B65G49/061 , B65G2249/045 , G02F1/1303 , H01L21/67346 , H01L21/67721 , H01L21/683 , H01L21/6838 , H01L21/68728
Abstract: Embodiments of the present application provide an apparatus for carrying a substrate by an off-line vacuum suction and a method for transporting a substrate. The apparatus includes a carrying frame provided with a clamper, a vacuum suction device and a detaching device arranged on the carrying frame, wherein the vacuum suction device is arranged to suck and fix a substrate and is connectable to and detachable from a vacuum pipeline and the detaching device is arranged to detach the vacuum suction device and the vacuum pipeline from each other while keeping the vacuum suction device to continuously suck the substrate to be transported. The apparatus and the method can improve fixing of the substrate and achieve off-line suction to the substrate.
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公开(公告)号：US12171126B2
公开(公告)日：2024-12-17
申请号：US17637504
申请日：2021-03-31
Inventor： Ning Liu , Dacheng Zhang , Tong Wu , Jun Liu , Qinghe Wang , Yang Zhang , Bin Zhou , Liangchen Yan , Huadong Wang , Chongchong Liu , Jie Zhang
IPC: H10K59/131 , H10K59/12 , H10K71/20
Abstract: A display substrate, a manufacturing method thereof, and a display device are provided. The display substrate includes a base substrate, organic light-emitting elements, a data line, and an electrode line. The organic light-emitting element includes a first electrode, a light-emitting layer and a second electrode sequentially stacked; the data line is located between the base substrate and the organic light-emitting element; the electrode line is on the same layer as the data line and located in a region outside a light-emitting region of the organic light-emitting element. The display substrate further includes at least one connection portion, which is in the region outside the light-emitting region and is configured to connect the electrode line and the first electrode, the connection portion is spaced apart from the second electrode, and the light-emitting layer covers the second electrode and the at least one connection portion.
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公开(公告)号：US11882716B2
公开(公告)日：2024-01-23
申请号：US17336523
申请日：2021-06-02
Inventor： Yang Zhang , Ning Liu , Bin Zhou , Leilei Cheng , Liangchen Yan , Jun Liu , Qinghe Wang , Tao Sun , Zhiwen Luo
IPC: H10K50/824 , H10K50/84 , H10K50/814 , H10K59/122 , H10K71/00
CPC classification number: H10K50/824 , H10K50/814 , H10K50/84 , H10K59/122 , H10K71/00
Abstract: A method for manufacturing a display panel includes: sequentially forming a conductive pattern, a light-emitting layer and a cathode layer on a substrate. The conductive pattern is formed by a one-time patterning process, and includes an auxiliary electrode layer. In a direction parallel to the substrate, both the first protective electrode and the second protective electrode in the auxiliary electrode layer extend over the metal electrode, a second orthographic projection of the second protective electrode on the substrate is within a first orthographic projection of the first protective electrode on the substrate, and an outer boundary of the second orthographic projection is staggered from an outer boundary of the first orthographic projection. The cathode layer is in contact with the first protective electrode and a sidewall of the metal electrode.
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公开(公告)号：US11723261B2
公开(公告)日：2023-08-08
申请号：US17271637
申请日：2020-05-14
Inventor： Tongshang Su , Dongfang Wang , Jun Liu , Yingbin Hu , Qinghe Wang , Shengping Du , Liangchen Yan
IPC: H10K71/16 , H10K50/824 , H10K50/11 , H10K71/00
CPC classification number: H10K71/166 , H10K50/11 , H10K50/824 , H10K71/621
Abstract: A method for manufacturing a light-emitting component, including forming an auxiliary electrode and a first electrode arranged at an interval on a base substrate; depositing, by means of a mask with a hollow area, a light-emitting layer on the base substrate on which the auxiliary electrode and the first electrode are formed; and forming a second electrode on the base substrate on which the light-emitting layer is formed. The light-emitting layer covers at least part of the first electrode, and at least a partial area of the auxiliary electrode is exposed outside the light-emitting layer. The second electrode covers at least part of the light-emitting layer and the at least partial area of the auxiliary electrode, and the second electrode is connected to the at least partial area of the auxiliary electrode.
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公开(公告)号：US11609466B2
公开(公告)日：2023-03-21
申请号：US17483595
申请日：2021-09-23
Inventor： Ning Zhu , Peng Jiang , Yanping Liao , Yujie Gao , Jun Liu
IPC: G02F1/1368 , G02F1/1362
Abstract: Disclosed in the disclosure are a display panel and a display device. The display panel includes: a first base substrate; a plurality of scan signal lines arranged on a side of the first base substrate; a plurality of data signal lines arranged on sides, facing away from the first base substrate, of the scan signal lines; and first shielding parts arranged on sides, facing away from the scan signal lines, of the data signal lines, wherein each first shielding part is of a strip structure, and in each sub-pixel unit, both sides of the data signal line are each provided with one first shielding part.
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Patent Agency Ranking
公开(公告)号：US11527599B2
公开(公告)日：2022-12-13
申请号：US16665410
申请日：2019-10-28
Inventor： Haitao Wang , Qinghe Wang , Jun Wang , Guangyao Li , Yang Zhang , Jun Liu , Dongfang Wang
IPC: H01L27/32 , G02F1/1362
Abstract: Disclosed are an array substrate, a method for fabricating the same, a display panel, and a display device, and the array substrate includes: an underlying substrate, and gate lines and data lines located on the underlying substrate, and intersecting with each other, a layer where the gate lines are located is between a layer where the data lines are located, and the underlying substrate; and the array substrate further includes a buffer layer located between the underlying substrate and the layer where the gate lines are located; and the buffer layer includes a plurality of through-holes, where orthographical projections of the through-holes onto the underlying substrate cover orthographical projections of the areas where the gate lines intersect with the data lines, onto the underlying substrate.
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公开(公告)号：US11469260B2
公开(公告)日：2022-10-11
申请号：US16761231
申请日：2019-10-28
Inventor： Ning Liu , Bin Zhou , Jun Liu , Yang Zhang , Tongshang Su , Haitao Wang
IPC: H01L27/12 , G03F7/00 , G03F7/16 , H01L21/311 , H01L21/3213
Abstract: The present disclosure provides a display substrate, a method for preparing the same, and a display device including the display substrate. The method includes: forming a conductive layer; forming a first photoresist pattern and a second photoresist pattern on the conductive layer, in which the adhesion between the first photoresist pattern and the conductive layer is less than the adhesion between the second photoresist pattern and the conductive layer; and etching the conductive layer by using the first photoresist pattern and the second photoresist pattern as masks to form a first conductive pattern and a second conductive pattern, respectively, in which a line width difference between the first conductive pattern and the first photoresist pattern is greater than a line width difference between the second conductive pattern and the second photoresist pattern.
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公开(公告)号：US11309428B2
公开(公告)日：2022-04-19
申请号：US16706160
申请日：2019-12-06
Inventor： Wei Song , Ce Zhao , Yuankui Ding , Ming Wang , Jun Liu , Yingbin Hu , Wei Li , Liusong Ni
IPC: H01L29/78 , H01L29/786 , H01L27/12 , H01L27/32
Abstract: The present disclosure provides a transistor and a manufacturing method thereof, a display substrate and a display device. The transistor includes: a base structure; an active layer on the base structure; and a gate electrode, a source electrode and a drain electrode that are all located on a side of the active layer distal to the base structure. The active layer includes a first region corresponding to an orthographic projection of the gate electrode on the base structure and a second region outside the orthographic projection. A surface of the base structure in contact with the active layer in the first region is not in the same plane as a surface of the base structure in contact with the active layer in the second region. The active layer in the first region has substantially the same thickness as a thickness of the active layer in the second region.
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公开(公告)号：US20220077255A1
公开(公告)日：2022-03-10
申请号：US17417334
申请日：2020-11-05
Inventor： Wei Li , Jingjing XIA , Bin Zhou , Yang Zhang , Guangyao Li , Wei Song , Xuanang Wang , Qinghe Wang , Liusong Ni , Jun Liu , Liangchen Yan , Ming Wang , Jingang Fang
Abstract: The present disclosure provides an array substrate, a method for manufacturing the array substrate, a display panel and a display device. The array substrate includes: a substrate; a planarization layer on a side of the substrate; a pixel defining layer configured to define a pixel opening region and located on a side of the planarization layer away from the substrate; an anode in the pixel opening region and on a side of the planarization layer away from the substrate. The array substrate further includes an intermediate insulation layer between the planarization layer and the pixel defining layer. The intermediate insulation layer has a chemical polarity between a chemical polarity of the planarization layer and a chemical polarity of the pixel defining layer.
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公开(公告)号：US11244972B2
公开(公告)日：2022-02-08
申请号：US16859558
申请日：2020-04-27
Abstract: An array substrate, a method for manufacturing the same and a display device are provided. The method includes: providing a base substrate; forming a conductive material thin film on the base substrate; forming a first photoresist layer on a side of the conductive material thin film distal to the base substrate; etching the conductive material thin film by using the first photoresist layer as a mask to obtain a first etched pattern; removing third covering portions of the first photoresist layer to obtain a second photoresist layer; and etching the first etched pattern by using the second photoresist layer as a mask to obtain a gate electrode and a signal line.
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