公开(公告)号：US20180307297A1

公开(公告)日：2018-10-25

申请号：US15496290

申请日：2017-04-25

Applicant: Apple Inc.

Inventor： Bernard Joseph Semeria ,  John H. Mylius ,  Pradeep Kanapathipillai ,  Richard F. Russo ,  Shih-Chieh Wen ,  Richard H. Larson

IPC: G06F1/32 ,  G06F9/38 ,  G06F3/06

CPC classification number: G06F1/3287 ,  G06F1/3206 ,  G06F1/3228 ,  G06F1/3296 ,  G06F3/0619 ,  G06F3/0625 ,  G06F3/065 ,  G06F3/067 ,  G06F9/3802

Abstract: Systems, apparatuses, and methods for retaining architected state for relatively frequent switching between sleep and active operating states are described. A processor receives an indication to transition from an active state to a sleep state. The processor stores a copy of a first subset of the architected state information in on-die storage elements capable of retaining storage after power is turned off. The processor supports programmable input/output (PIO) access of particular stored information during the sleep state. When a wakeup event is detected, circuitry within the processor is powered up again. A boot sequence and recovery of architected state from off-chip memory are not performed. Rather than fetch from a memory location pointed to by a reset base address register, the processor instead fetches an instruction from a memory location pointed to by a restored program counter of the retained subset of the architected state information.

公开(公告)号：US10101788B2

公开(公告)日：2018-10-16

申请号：US15433201

申请日：2017-02-15

Applicant: Apple Inc.

Inventor： John H. Mylius ,  Conrad H. Ziesler ,  Daniel C. Murray ,  Jong-Suk Lee ,  Rohit Kumar

IPC: G06F1/32

Abstract: In an embodiment, an integrated circuit includes multiple instances of a component (e.g. a processor) and a control circuit. The instances may be configured to operate in various modes. Some of the modes are incapable of presenting a worst-case load on the power supply. The control circuit may be configured to monitor the instances and detect the modes in which the instances are operating. Based on the monitoring, the control circuit may request to recover a portion of the voltage margin established for worst-case conditions in the instances. If the instances are to change modes, they may be configured to request mode change from the control circuit. If the mode change causes an increase in the current supply voltage magnitude (e.g. to restore some of the recovered voltage margin), the control circuit may cause the restore and permit it to complete prior to granting the mode change.

公开(公告)号：US20150253836A1

公开(公告)日：2015-09-10

申请号：US14200216

申请日：2014-03-07

Applicant: Apple Inc.

Inventor： John H. Mylius ,  Conrad H. Ziesler ,  Daniel C. Murray ,  Jong-Suk Lee ,  Rohit Kumar

IPC: G06F1/32

CPC classification number: G06F1/3209 ,  G06F1/3206 ,  G06F1/324 ,  G06F1/3287 ,  G06F1/3296 ,  Y02D10/126 ,  Y02D10/171 ,  Y02D10/172

Abstract: In an embodiment, an integrated circuit includes multiple instances of a component (e.g. a processor) and a control circuit. The instances may be configured to operate in various modes. Some of the modes are incapable of presenting a worst-case load on the power supply. The control circuit may be configured to monitor the instances and detect the modes in which the instances are operating. Based on the monitoring, the control circuit may request to recover a portion of the voltage margin established for worst-case conditions in the instances. If the instances are to change modes, they may be configured to request mode change from the control circuit. If the mode change causes an increase in the current supply voltage magnitude (e.g. to restore some of the recovered voltage margin), the control circuit may cause the restore and permit it to complete prior to granting the mode change.

Abstract translation: 在一个实施例中，集成电路包括组件（例如处理器）和控制电路的多个实例。 这些实例可以被配置为以各种模式操作。 一些模式不能在电源上呈现最坏的负载。 控制电路可以被配置为监视实例并检测实例正在操作的模式。 基于监视，控制电路可以请求恢复在实例中为最坏情况条件建立的电压余量的一部分。 如果实例要改变模式，则它们可以被配置为从控制电路请求模式改变。 如果模式改变导致当前电源电压幅度的增加（例如，恢复一些恢复的电压余量），则控制电路可以在授予模式改变之前导致恢复并允许其恢复。

公开(公告)号：US08583967B2

公开(公告)日：2013-11-12

申请号：US13741436

申请日：2013-01-15

Applicant: Apple Inc.

Inventor： Kevin R. Walker ,  John H. Mylius

IPC: G06F11/00

CPC classification number: G06F11/3636 ,  G06F11/3476

Abstract: In one embodiment, an integrated circuit comprises a first processor configured to output program counter (PC) trace records, wherein PC trace records provide data indicating the PCs of instructions retired by the first processor. The integrated circuit further comprises a second source of trace records, and a trace unit coupled to receive the PC trace records from the first processor and the trace records from the second source. The trace unit comprises a trace memory into which the trace unit is configured to store the PC trace records and trace records from the second source. The trace unit is configured to interleave the PC trace records and the trace records from the second source in the trace memory according to the order of receipt of the records.