公开(公告)号：US20120320957A1

公开(公告)日：2012-12-20

申请号：US13592723

申请日：2012-08-23

申请人： Satoshi TANAKA ,  Hiroshi Kamizuma ,  Koji Maeda ,  Sungwoo Cha ,  Yukinori Akamine ,  Taizo Yamawaki

发明人： Satoshi TANAKA ,  Hiroshi Kamizuma ,  Koji Maeda ,  Sungwoo Cha ,  Yukinori Akamine ,  Taizo Yamawaki

IPC分类号： H04B1/38

CPC分类号： H04B1/28

摘要： The transmitter of the transceiver includes: a transmitter-side mixers of a transmitter-side modulator; a transmitter-side voltage-controlled oscillator; and a transmitter-side divider. The divider having a dividing factor of a non-integral number is supplied with an oscillating output of the oscillator. A pair of non-quadrature local signals having a phase difference of 90° plus a predetermined offset angle is produced by the divider and supplied to the mixers. The transmitter includes a phase-shift unit which converts a pair of quadrature transmit signals having a phase difference of about 90° on an analog basis into a pair of non-quadrature shifted transmit signals. Consequently, quadrature modulation is performed by the mixers. Use of a similar configuration enables the reduction in interference of an RF signal with local signals supplied to receiver-side mixers of the receiver.

摘要翻译： 收发器的发射机包括：发射机侧调制器的发射机侧混频器; 发射机侧压控振荡器; 和发射机侧分频器。 具有非积分数的分频因子的分频器被提供有振荡器的振荡输出。 具有90°相位差和预定偏移角的一对非正交本地信号由分频器产生并提供给混频器。 发射机包括相移单元，其将具有大约90°的相位差的一对正交发射信号在模拟上转换成一对非正交移位的发射信号。 因此，正交调制由混频器执行。 使用类似的配置使得能够减少RF信号与提供给接收机的接收机侧混频器的本地信号的干扰。

公开(公告)号：US20120064840A1

公开(公告)日：2012-03-15

申请号：US13303103

申请日：2011-11-22

申请人： Satoshi TANAKA ,  Hiroshi Kamizuma ,  Koji Maeda ,  Sungwoo Cha ,  Yukinori Akamine ,  Taizo Yamawaki

发明人： Satoshi TANAKA ,  Hiroshi Kamizuma ,  Koji Maeda ,  Sungwoo Cha ,  Yukinori Akamine ,  Taizo Yamawaki

IPC分类号： H04B1/40

CPC分类号： H04B1/28

摘要： The transmitter of the transceiver includes: a transmitter-side mixers of a transmitter-side modulator; a transmitter-side voltage-controlled oscillator; and a transmitter-side divider. The divider having a dividing factor of a non-integral number is supplied with an oscillating output of the oscillator. A pair of non-quadrature local signals having a phase difference of 90° plus a predetermined offset angle is produced by the divider and supplied to the mixers. The transmitter includes a phase-shift unit which converts a pair of quadrature transmit signals having a phase difference of about 90° on an analog basis into a pair of non-quadrature shifted transmit signals. Consequently, quadrature modulation is performed by the mixers. Use of a similar configuration enables the reduction in interference of an RF signal with local signals supplied to receiver-side mixers of the receiver.

公开(公告)号：US08055218B2

公开(公告)日：2011-11-08

申请号：US11158094

申请日：2005-06-22

申请人： Satoshi Tanaka ,  Yukinori Akamine ,  Manabu Kawabe ,  Yasuyuki Kimura ,  Takao Okazaki

发明人： Satoshi Tanaka ,  Yukinori Akamine ,  Manabu Kawabe ,  Yasuyuki Kimura ,  Takao Okazaki

IPC分类号： H01Q11/12 ,  H04B1/04

CPC分类号： H04B1/006

摘要： This invention provides a wireless transmitter circuit for mobile communication apparatus and this circuit can be configured with fewer components and is suitable for downsizing. A single PLL synthesizer serves as both RF frequency band PLL and IF frequency band PLL among three oscillators for TX, RX and IF frequency bands, which have been required in conventional mobile communication apparatus. The number of necessary oscillators occupying a large area within a chip is reduced and the number of components is decreased. Specifically, circuitry is arranged to generate local oscillation signals for RF and IF frequency bands by frequency dividing the output of a VCO of the RF frequency band PLL.

摘要翻译： 本发明提供了一种用于移动通信设备的无线发射机电路，该电路可以配置成较少的组件，并且适合于小型化。 在常规移动通信设备中已经需要的TX，RX和IF频段的三个振荡器中，单个PLL合成器用作RF频带PLL和IF频带PLL两者。 占用芯片内大面积的必要振荡器的数量减少，并且部件的数量减少。 具体地，电路被布置成通过对RF频带PLL的VCO的输出进行分频来产生用于RF和IF频带的本地振荡信号。

公开(公告)号：US08036605B2

公开(公告)日：2011-10-11

申请号：US12336178

申请日：2008-12-16

申请人： Hiroshi Kamizuma ,  Satoshi Tanaka ,  Taizo Yamawaki ,  Yukinori Akamine ,  Koji Maeda

发明人： Hiroshi Kamizuma ,  Satoshi Tanaka ,  Taizo Yamawaki ,  Yukinori Akamine ,  Koji Maeda

IPC分类号： H04B1/40

CPC分类号： H04B1/0082

摘要： A transceiver includes an oscillator and a plurality of communication blocks. Each of the communication blocks includes frequency dividers and mixers. Frequency dividing number of the frequency divider included in one communication block is set to an even-numbered integer, and transmission local signals supplied from the frequency dividers to the mixer become quadrature signals having a phase difference of 90 degrees. The frequency dividing number of another frequency divider in the another communication block is set to a non-integer, and communication local signals supplied from the frequency divider to the mixers become non-quadrature signals having a phase difference at a predetermined offset angle from 90 degrees. The transceiver further includes a converting unit for giving a compensation offset amount having almost the same absolute value and having a polarity opposite to that of the offset angle to communication analog signals related to the mixer of the another communication block. Increase in the number of voltage-controlled oscillators for multiband communication, broadening of the band, and increase in phase noise can be reduced.

摘要翻译： 收发机包括振荡器和多个通信块。 每个通信块包括分频器和混频器。 包含在一个通信块中的分频器的分频数被设置为偶数整数，并且从分频器提供给混频器的发送本地信号变为具有90度相位差的正交信号。 将另一通信块中的另一个分频器的分频数设置为非整数，并且从分频器提供给混频器的通信本地信号变为具有从90度的预定偏移角的相位差的非正交信号 。 收发器还包括转换单元，用于给出具有与相对于另一通信块的混频器相关的通信模拟信号具有几乎相同的绝对值并且具有与偏移角的极性相反的极性的补偿偏移量。 可以减少用于多频带通信的压控振荡器的数量的增加，频带的扩大以及相位噪声的增加。

公开(公告)号：US20110128992A1

公开(公告)日：2011-06-02

申请号：US12955865

申请日：2010-11-29

申请人： Koji MAEDA ,  Taizo Yamawaki ,  Yukinori Akamine

发明人： Koji MAEDA ,  Taizo Yamawaki ,  Yukinori Akamine

IPC分类号： H04L27/18 ,  H04B7/00 ,  H04B1/69 ,  H04B17/00

CPC分类号： H04L27/3863 ,  H04B17/0085 ,  H04B17/21 ,  H04L25/06

摘要： The semiconductor integrated communication circuit includes:a low-noise amplifier; a receive mixer; a receive VCO; a demodulation-processing circuit; a modulation-processing circuit; a transmit mixer; a transmit VCO; a second-order-distortion-characteristic-calibration circuit; a quadrature-receive-signal-calibration circuit; and a test-signal generator. The test-signal generator generates first and second test signals using the transmit VCO. In the second-order-distortion-characteristic-calibration mode, the second-order-distortion-characteristic-calibration circuit variably changes an operation parameter of the receive mixer thereby to calibrate the second-order distortion characteristic to achieve its best condition while the first test signal is supplied to the receive mixer. In the quadrature-receive-signal-calibration mode, the quadrature-receive-signal-calibration circuit calibrates IQ mismatch of a quadrature receive signal to achieve the best condition thereof while the second test signal is supplied to the receive mixer. The integrated communication circuit can minimize the increase in chip footprint of a test-signal-generating circuit used to perform calibrations of both the second-order characteristic and IQ mismatch.

摘要翻译： 半导体集成通信电路包括：低噪声放大器; 接收混音器 接收VCO; 解调处理电路; 调制处理电路; 发射混频器; 发射VCO; 二阶畸变特征校准电路; 正交接收信号校准电路; 和测试信号发生器。 测试信号发生器使用发射VCO产生第一和第二测试信号。 在二次失真特性校准模式中，二阶失真特性校准电路可变地改变接收混频器的操作参数，从而校正二阶失真特性，以实现其最佳状态，而第一 测试信号被提供给接收混频器。 在正交接收信号校准模式中，正交接收信号校准电路校准正交接收信号的IQ失配，以实现其最佳状态，同时将第二测试信号提供给接收混频器。 集成通信电路可以最小化用于执行二阶特性和IQ失配校准的测试信号发生电路的芯片占用面积的增加。

公开(公告)号：US07800452B2

公开(公告)日：2010-09-21

申请号：US11976408

申请日：2007-10-24

申请人： Manabu Kawabe ,  Kazuyuki Hori ,  Satoshi Tanaka ,  Yukinori Akamine ,  Masumi Kasahara ,  Kazuo Watanabe

发明人： Manabu Kawabe ,  Kazuyuki Hori ,  Satoshi Tanaka ,  Yukinori Akamine ,  Masumi Kasahara ,  Kazuo Watanabe

IPC分类号： H03L7/00

CPC分类号： H03L7/107 ,  H03C3/0925 ,  H03C3/0941 ,  H03C3/0991 ,  H03L7/1974 ,  H03L7/1976

摘要： The present invention provides a PLL circuit containing a loop gain circuit capable of suppressing loop gain variation.This PLL circuit includes a counter that is driven by a voltage controlled oscillator within the PLL circuit, an accumulator (ACL) that accumulates the output of the counter, and a comparison operation circuit block that compares the count value of the ACL and the design value pre-stored in a register, and the loop gain of the PLL circuit is detected taking advantage of the fact that the ACL count value is inversely proportional to the loop gain. Based on the detection result, the loop gain is calibrated by correcting the loop gain with a charge pump current, etc. This allows the PLL circuit to maintain stable loop characteristics that will not affect the characteristics variation of each element constituting the PLL.

摘要翻译： 本发明提供一种包含能够抑制环路增益变化的环路增益电路的PLL电路。 该PLL电路包括由PLL电路内的压控振荡器驱动的计数器，累加计数器的输出的累加器（ACL），以及将ACL的计数值与设计值进行比较的比较运算电路块 预先存储在寄存器中，并且利用ACL计数值与循环增益成反比的事实来检测PLL电路的环路增益。 基于检测结果，通过用电荷泵电流等校正环路增益来校准环路增益。这允许PLL电路保持不会影响构成PLL的每个元件的特性变化的稳定环路特性。

公开(公告)号：US07783273B2

公开(公告)日：2010-08-24

申请号：US11543928

申请日：2006-10-06

申请人： Koji Maeda ,  Satoshi Tanaka ,  Yukinori Akamine ,  Manabu Kawabe

发明人： Koji Maeda ,  Satoshi Tanaka ,  Yukinori Akamine ,  Manabu Kawabe

IPC分类号： H04B1/10 ,  H04B7/00

CPC分类号： H04B1/30 ,  H03D3/009

摘要： The receiver, which enables rejection of image signals with higher accuracy over wider frequency band, can be provided as a low IF receiver by inputting a calibration signal of frequency fi (1≦i≦N) before reception of signals and determining the frequency response fa(z) to fd(z) of a calibrating filter in a filter mismatch calibrating circuit (FIL_CAL) 195 to make zero amplitude and phase mismatches between the I component and Q component of the quadrature demodulation signal at the frequency fIFi.

摘要翻译： 可以通过在接收信号之前输入频率fi（1＆nlE; i＆nlE; N）的校准信号，并且确定频率响应fa，可以在较宽的频带上抑制具有更高精度的图像信号的接收机作为低IF接收机 （FIL_CAL）195中的校准滤波器的（z）至fd（z），以在fIFi频率处的正交解调信号的I分量和Q分量之间产生零幅度和相位失配。

公开(公告)号：US20080061890A1

公开(公告)日：2008-03-13

申请号：US11976408

申请日：2007-10-24

申请人： Manabu Kawabe ,  Kazuyuki Hori ,  Satoshi Tanaka ,  Yukinori Akamine ,  Masumi Kasahara ,  Kazuo Watanabe

发明人： Manabu Kawabe ,  Kazuyuki Hori ,  Satoshi Tanaka ,  Yukinori Akamine ,  Masumi Kasahara ,  Kazuo Watanabe

IPC分类号： H03L7/00

CPC分类号： H03L7/107 ,  H03C3/0925 ,  H03C3/0941 ,  H03C3/0991 ,  H03L7/1974 ,  H03L7/1976

摘要： The present invention provides a PLL circuit containing a loop gain circuit capable of suppressing loop gain variation. This PLL circuit includes a counter that is driven by a voltage controlled oscillator within the PLL circuit, an accumulator (ACL) that accumulates the output of the counter, and a comparison operation circuit block that compares the count value of the ACL and the design value pre-stored in a register, and the loop gain of the PLL circuit is detected taking advantage of the fact that the ACL count value is inversely proportional to the loop gain. Based on the detection result, the loop gain is calibrated by correcting the loop gain with a charge pump current, etc. This allows the PLL circuit to maintain stable loop characteristics that will not affect the characteristics variation of each element constituting the PLL.

摘要翻译： 本发明提供一种包含能够抑制环路增益变化的环路增益电路的PLL电路。 该PLL电路包括由PLL电路内的压控振荡器驱动的计数器，累加计数器的输出的累加器（ACL），以及将ACL的计数值与设计值进行比较的比较运算电路块 预先存储在寄存器中，并且利用ACL计数值与循环增益成反比的事实来检测PLL电路的环路增益。 基于检测结果，通过用电荷泵电流等校正环路增益来校准环路增益。这允许PLL电路保持不会影响构成PLL的每个元件的特性变化的稳定环路特性。

公开(公告)号：US20070080835A1

公开(公告)日：2007-04-12

申请号：US11543928

申请日：2006-10-06

申请人： Koji Maeda ,  Satoshi Tanaka ,  Yukinori Akamine ,  Manabu Kawabe

发明人： Koji Maeda ,  Satoshi Tanaka ,  Yukinori Akamine ,  Manabu Kawabe

IPC分类号： H03M1/10

CPC分类号： H04B1/30 ,  H03D3/009

摘要： The receiver, which enables rejection of image signals with higher accuracy over wider frequency band, can be provided as a low IF receiver by inputting a calibration signal of frequency fi (1≦i≦N) before reception of signals and determining the frequency response fa(z) to fd(z) of a calibrating filter in a filter mismatch calibrating circuit (FIL_CAL) 195 to make zero amplitude and phase mismatches between the I component and Q component of the quadrature demodulation signal at the frequency fIFi.

摘要翻译： 可以通过输入频率f 1的校准信号（1≤i≤N）来提供能够在较宽频带上以较高精度抑制图像信号的接收机作为低IF接收机， 在接收信号之前确定滤波器失配校准电路（FIL_CAL）195中的校准滤波器的频率响应f（z）至f（d）（z），以使 正交解调信号的I分量和Q分量之间的零幅度和相位失配在频率f IFi 。

公开(公告)号：US20120069876A1

公开(公告)日：2012-03-22

申请号：US13238249

申请日：2011-09-21

申请人： Hiroshi Kamizuma ,  Satoshi Tanaka ,  Taizo Yamawaki ,  Yukinori Akamine ,  Koji Maeda

发明人： Hiroshi Kamizuma ,  Satoshi Tanaka ,  Taizo Yamawaki ,  Yukinori Akamine ,  Koji Maeda

IPC分类号： H04B1/38

CPC分类号： H04B1/0082

摘要： A transceiver includes an oscillator and a plurality of communication blocks. Each of the communication blocks includes frequency dividers and mixers. Frequency dividing number of the frequency divider included in one communication block is set to an even-numbered integer, and transmission local signals supplied from the frequency dividers to the mixer become quadrature signals having a phase difference of 90 degrees. The frequency dividing number of another frequency divider in the another communication block is set to a non-integer, and communication local signals supplied from the frequency divider to the mixers become non-quadrature signals having a phase difference at a predetermined offset angle from 90 degrees. The transceiver further includes a converting unit for giving a compensation offset amount having almost the same absolute value and having a polarity opposite to that of the offset angle to communication analog signals related to the mixer of the another communication block.

摘要翻译： 收发机包括振荡器和多个通信块。 每个通信块包括分频器和混频器。 包含在一个通信块中的分频器的分频数被设置为偶数整数，并且从分频器提供给混频器的发送本地信号变为具有90度相位差的正交信号。 将另一通信块中的另一个分频器的分频数设置为非整数，并且从分频器提供给混频器的通信本地信号变为具有从90度的预定偏移角的相位差的非正交信号 。 收发器还包括转换单元，用于给出具有与相对于另一通信块的混频器相关的通信模拟信号具有几乎相同的绝对值并且具有与偏移角的极性相反的极性的补偿偏移量。