公开(公告)号：US09256949B2

公开(公告)日：2016-02-09

申请号：US13919384

申请日：2013-06-17

Applicant: SAMSUNG ELECTRONICS CO., LTD. ,  SEOUL NATIONAL UNIVERSITY R&DB FOUNDATION

Inventor： Sang-Heon Lee ,  Soo-Jung Ryu ,  Yeon-Gon Cho ,  Do-Hyun Kim ,  Yeong-Gil Shin ,  Byeong-Hun Lee

IPC: G06T7/00

CPC classification number: G06T7/0081 ,  G06T7/11 ,  G06T2207/10081

Abstract: A region growing apparatus using multi-core includes a plurality of cores, each core including an operation controller configured to perform an operation for region growing of a 2D pixel region or 3D pixel region and an inner memory configured to store a queue associated with a seed pixel as a target of the operation; and a shared memory connected to the plurality of cores over a network and shared by the plurality of cores.

Abstract translation: 使用多核的区域生长装置包括多个核心，每个核心包括被配置为执行2D像素区域或3D像素区域的区域生长的操作的操作控制器和被配置为存储与种子相关联的队列的内部存储器 像素作为操作的目标; 以及通过网络连接到所述多个核并由所述多个核共享的共享存储器。

公开(公告)号：US10120833B2

公开(公告)日：2018-11-06

申请号：US14165881

申请日：2014-01-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Woong Seo ,  Yeon-Gon Cho ,  Soo-Jung Ryu

IPC: G06F15/80 ,  G06F9/38 ,  G06F9/30

Abstract: Embodiments include a processor capable of supporting multi-mode and corresponding methods. The processor includes front end units, a number of processing elements more than a number of the front end units; and a controller configured to determine if thread divergence occurs due to conditional branching. If there is thread divergence, the processor may set control information to control processing elements using currently activated front end units. If there is not, the processor may set control information to control processing elements using a currently activated front end unit.

公开(公告)号：US09645855B2

公开(公告)日：2017-05-09

申请号：US14276522

申请日：2014-05-13

Applicant: Samsung Electronics Co., Ltd. ,  Korea Advanced Institute of Science and Technology

Inventor： Woong Seo ,  Yeon-Gon Cho ,  Soo-Jung Ryu ,  Seok-Woo Song ,  John Dongjun Kim ,  Min-Seok Lee

IPC: G06F9/50 ,  G06F9/46 ,  G06F9/48

CPC classification number: G06F9/505 ,  G06F9/46 ,  G06F9/4881 ,  G06F2209/5022

Abstract: An apparatus and a job scheduling method are provided. For example, the apparatus is a multi-core processing apparatus. The apparatus and method minimize performance degradation of a core caused by sharing resources by dynamically managing a maximum number of jobs assigned to each core of the apparatus. The apparatus includes at least one core including an active cycle counting unit configured to store a number of active cycles and a stall cycle counting unit configured to store a number of stall cycles and a job scheduler configured to assign at least one job to each of the at least one core, based on the number of active cycles and the number of stall cycles. When the ratio of the number of stall cycles to a number of active cycles for a core is too great, the job scheduler assigns fewer jobs to that core to improve performance.

公开(公告)号：US09542188B2

公开(公告)日：2017-01-10

申请号：US13734526

申请日：2013-01-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hee-Jun Shim ,  Yeon-Gon Cho

IPC: G06F9/38 ,  G06F11/36

CPC classification number: G06F9/38 ,  G06F11/3636 ,  G06F11/3648

Abstract: Provided is a hardware debugging apparatus and method for a software-pipelined program. The hardware debugging apparatus and method overcome a currency problem caused during hardware debugging in the software-pipelined program by guarding certain execution blocks and restarting the processing of the software-pipelined program.

Abstract translation: 提供了一种用于软件流水线程序的硬件调试装置和方法。 硬件调试装置和方法通过保护某些执行块并重新启动软件流水线程序的处理，克服了软件流水线程序硬件调试过程中造成的货币问题。

公开(公告)号：US09298430B2

公开(公告)日：2016-03-29

申请号：US14051910

申请日：2013-10-11

Applicant: SAMSUNG ELECTRONICS CO., LTD. ,  SEOUL NATIONAL UNIVERSITY R&DB FOUNDATION

Inventor： Jin-Hoo Lee ,  Moo-Kyoung Chung ,  Key-Young Choi ,  Yeon-Gon Cho ,  Soo-Jung Ryu

IPC: G06F9/45

CPC classification number: G06F8/41 ,  G06F8/45

Abstract: A method of compiling a program to be executed on a multicore processor is provided. The method may include generating an initial solution by mapping a task to a source processing element (PE) and a destination PE, and selecting a communication scheme for transmission of the task from the source PE to the destination PE, approximately optimizing the mapping and communication scheme included in the initial solution, and scheduling the task, wherein the communication scheme is designated in a compiling process.

Abstract translation: 提供了一种编译要在多核处理器上执行的程序的方法。 该方法可以包括通过将任务映射到源处理单元（PE）和目的地PE来生成初始解决方案，并且从源PE到目的地PE选择用于传输任务的通信方案，大致优化映射和通信 包括在初始解决方案中，并且调度任务，其中在编译过程中指定通信方案。