Abstract:
A nonvolatile memory device and method of fabricating same, the nonvolatile memory device including a substrate; a first semiconductor layer on the substrate; an etching stop film including a metal oxide on the first semiconductor layer; a mold structure including second semiconductor layers and insulating layers alternately stacked on the etching stop film; a channel hole penetrating through at least one of the mold structure, the etching stop film, the second semiconductor layer and the substrate; and a channel structure extending along a side wall of the channel hole, including an anti-oxidant film, a first blocking insulation film, a second blocking insulation film, a charge storage film, a tunnel insulating film and a channel semiconductor sequentially formed along the side wall of the channel hole. The first semiconductor layer contacts the first blocking insulation film, the second blocking insulation film, the charge storage film, and the tunnel insulating film.
Abstract:
A memory overlay apparatus includes an internal memory that includes a dirty bit indicating a changed memory area, a memory management unit that controls an external memory to store only changed data so that only data actually being used by a task during overlay is stored and restored, and a direct memory access (DMA) management unit that confirms the dirty bit when the task is changed and that moves a data area of the task between the internal memory and the external memory.
Abstract:
An apparatus and method for tile binning with respect to a Bezier curve. The apparatus may include a curve identification unit to identify a Bezier curve included in input data, a bounding box generation unit to generate a plurality of bounding boxes corresponding to the Bezier curve, and a tile binning unit to perform tile binning with respect to the Bezier curve based on the plurality of bounding boxes.
Abstract:
An apparatus for performing partition scheduling in a manycore environment. The apparatus may perform partition scheduling based on a priority and in this instance, may perform partition scheduling to minimize the number of idle cores. The apparatus may include a partition queue to manage a partition scheduling event; a partition scheduler including a core map to store hardware information of each of the plurality of cores; and a partition manager to perform partition scheduling with respect to the plurality of cores in response to the partition scheduling event, using the hardware information.
Abstract:
An apparatus for electronic signature verification, including a grouping unit to group, into at least one group, a plurality of kernels included in an application to which electronic signature verification is to be performed, and an electronic signature verification unit to perform electronic signature verification with respect to the at least one group.
Abstract:
An apparatus and method for rendering a tile-binned Bezier curve may include a rendering calculator to determine a rendering scheme for at least one tile, with respect to the tile-binned Bezier curve, and a rendering processor to perform rendering with respect to a Bezier curve for the at least one tile, based on the determined rendering scheme. The rendering calculator may suspend the rendering of the Bezier curve at a boundary point between the at least one tile and an adjacent tile while the rendering is being performed, and determine the rendering scheme for a boundary value in which a position of the boundary point is reflected to be used when the adjacent tile is rendered.
Abstract:
An image processing apparatus. A rendering unit of the image processing apparatus may perform rendering with respect to each of N passes by applying a multi-pass rendering process with respect to an object in an image. The image processing apparatus may include a texture buffer to store information about at least one pixel using second pass rendering different from first pass rendering, while performing the first pass rendering corresponding to a process of generating a final result image among the N passes.
Abstract:
A method and apparatus for guaranteeing real-time operation of an application program that performs data processing and particular functions in a computer environment using a micro architecture are provided. The apparatus estimates execution times of kernels based on an effective progress index (EPI) of each of the kernels, and determines an execution order of the kernels based on the estimated execution times of the kernels and priority of the kernels.
Abstract:
A memory overlay apparatus includes an internal memory that includes a dirty bit indicating a changed memory area, a memory management unit that controls an external memory to store only changed data so that only data actually being used by a task during overlay is stored and restored, and a direct memory access (DMA) management unit that confirms the dirty bit when the task is changed and that moves a data area of the task between the internal memory and the external memory.
Abstract:
An apparatus and method for dynamically reconfiguring an Operating System (OS) for a manycore system are provided. The apparatus may include an application type determining unit to determine a type of an executed application, and an OS reconfiguring unit to activate only at least one function in an OS, based on the determined type of the application, and to reconfigure the OS.